bool i915_bound; /* was i915 bound in this driver? */
 
        struct hdac_chmap chmap;
+       hda_nid_t vendor_nid;
 };
 
 #ifdef CONFIG_SND_HDA_I915
 }
 
 #define INTEL_VENDOR_NID 0x08
+#define INTEL_GLK_VENDOR_NID 0x0B
 #define INTEL_GET_VENDOR_VERB 0xf81
 #define INTEL_SET_VENDOR_VERB 0x781
 #define INTEL_EN_DP12                  0x02 /* enable DP 1.2 features */
                                          bool update_tree)
 {
        unsigned int vendor_param;
+       struct hdmi_spec *spec = codec->spec;
 
-       vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
+       vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
                                INTEL_GET_VENDOR_VERB, 0);
        if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
                return;
 
        vendor_param |= INTEL_EN_ALL_PIN_CVTS;
-       vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
+       vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
                                INTEL_SET_VENDOR_VERB, vendor_param);
        if (vendor_param == -1)
                return;
 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
 {
        unsigned int vendor_param;
+       struct hdmi_spec *spec = codec->spec;
 
-       vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
+       vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
                                INTEL_GET_VENDOR_VERB, 0);
        if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
                return;
        /* enable DP1.2 mode */
        vendor_param |= INTEL_EN_DP12;
        snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB);
-       snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
+       snd_hda_codec_write_cache(codec, spec->vendor_nid, 0,
                                INTEL_SET_VENDOR_VERB, vendor_param);
 }
 
 }
 
 /* Intel Haswell and onwards; audio component with eld notifier */
-static int patch_i915_hsw_hdmi(struct hda_codec *codec)
+static int intel_hsw_common_init(struct hda_codec *codec, hda_nid_t vendor_nid)
 {
        struct hdmi_spec *spec;
        int err;
        spec = codec->spec;
        codec->dp_mst = true;
        spec->dyn_pcm_assign = true;
+       spec->vendor_nid = vendor_nid;
 
        intel_haswell_enable_all_pins(codec, true);
        intel_haswell_fixup_enable_dp12(codec);
        return 0;
 }
 
+static int patch_i915_hsw_hdmi(struct hda_codec *codec)
+{
+       return intel_hsw_common_init(codec, INTEL_VENDOR_NID);
+}
+
+static int patch_i915_glk_hdmi(struct hda_codec *codec)
+{
+       return intel_hsw_common_init(codec, INTEL_GLK_VENDOR_NID);
+}
+
 /* Intel Baytrail and Braswell; with eld notifier */
 static int patch_i915_byt_hdmi(struct hda_codec *codec)
 {
 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI",    patch_i915_hsw_hdmi),
 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI",    patch_i915_hsw_hdmi),
 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI",   patch_i915_hsw_hdmi),
-HDA_CODEC_ENTRY(0x8086280d, "Geminilake HDMI", patch_i915_hsw_hdmi),
+HDA_CODEC_ENTRY(0x8086280d, "Geminilake HDMI", patch_i915_glk_hdmi),
 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI", patch_generic_hdmi),
 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI",        patch_i915_byt_hdmi),
 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI",   patch_i915_byt_hdmi),