scsi: ufs: host: mediatek: Add DDR_EN setting

On MT6989 and later platforms, control of DDR_EN has been switched from
SPM to EMI. To prevent abnormal access to DRAM, it is necessary to wait
for 'ddren_ack' or assert 'ddren_urgent' after sending 'ddren_req'.

Introduce the DDR_EN configuration in the UFS initialization flow,
utilizing the assertion of 'ddren_urgent' to maintain performance.

Signed-off-by: Naomi Chu <naomi.chu@mediatek.com>
Link: https://lore.kernel.org/r/20250722030841.1998783-3-peter.wang@mediatek.com
Reviewed-by: Peter Wang <peter.wang@mediatek.com>
Reviewed-by: Chun-Hung Wu <chun-hung.wu@mediatek.com>
Signed-off-by: Peter Wang <peter.wang@mediatek.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 744efcde1fff944c517627b3411acf9c892be38a..90351fff501cf2cf9da4b8a461f559206ae6d3d8 100644 (file)
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -267,6 +267,13 @@ static int ufs_mtk_hce_enable_notify(struct ufs_hba *hba,
                ufshcd_writel(hba,
                              ufshcd_readl(hba, REG_UFS_XOUFS_CTRL) | 0x80,
                              REG_UFS_XOUFS_CTRL);
+
+               /* DDR_EN setting */
+               if (host->ip_ver >= IP_VER_MT6989) {
+                       ufshcd_rmwl(hba, UFS_MASK(0x7FFF, 8),
+                               0x453000, REG_UFS_MMIO_OPT_CTRL_0);
+               }
+
        }
 
        return 0;

diff --git a/drivers/ufs/host/ufs-mediatek.h b/drivers/ufs/host/ufs-mediatek.h
index 05d76a6bd772648ab2458f46bf85d17deaa58900..1082f761bb44fc89f2d4cc4b3e47beb779478ff3 100644 (file)
--- a/drivers/ufs/host/ufs-mediatek.h
+++ b/drivers/ufs/host/ufs-mediatek.h
@@ -192,4 +192,16 @@ struct ufs_mtk_host {
 /* MTK RTT support number */
 #define MTK_MAX_NUM_RTT 2
 
+/* UFSHCI MTK ip version value */
+enum {
+       /* UFSHCI 3.1 */
+       IP_VER_MT6878    = 0x10420200,
+
+       /* UFSHCI 4.0 */
+       IP_VER_MT6897    = 0x10440000,
+       IP_VER_MT6989    = 0x10450000,
+
+       IP_VER_NONE      = 0xFFFFFFFF
+};
+
 #endif /* !_UFS_MEDIATEK_H */