cdesc = (struct ena_eth_io_rx_cdesc_base *)(io_cq->cdesc_addr.virt_addr
                        + (head_masked * io_cq->cdesc_entry_size_in_bytes));
 
-       desc_phase = (cdesc->status & ENA_ETH_IO_RX_CDESC_BASE_PHASE_MASK) >>
+       desc_phase = (READ_ONCE(cdesc->status) & ENA_ETH_IO_RX_CDESC_BASE_PHASE_MASK) >>
                        ENA_ETH_IO_RX_CDESC_BASE_PHASE_SHIFT;
 
        if (desc_phase != expected_phase)
 
                ena_com_cq_inc_head(io_cq);
                count++;
-               last = (cdesc->status & ENA_ETH_IO_RX_CDESC_BASE_LAST_MASK) >>
+               last = (READ_ONCE(cdesc->status) & ENA_ETH_IO_RX_CDESC_BASE_LAST_MASK) >>
                        ENA_ETH_IO_RX_CDESC_BASE_LAST_SHIFT;
        } while (!last);
 
         * expected, it mean that the device still didn't update
         * this completion.
         */
-       cdesc_phase = cdesc->flags & ENA_ETH_IO_TX_CDESC_PHASE_MASK;
+       cdesc_phase = READ_ONCE(cdesc->flags) & ENA_ETH_IO_TX_CDESC_PHASE_MASK;
        if (cdesc_phase != expected_phase)
                return -EAGAIN;
 
        ena_com_cq_inc_head(io_cq);
 
-       *req_id = cdesc->req_id;
+       *req_id = READ_ONCE(cdesc->req_id);
 
        return 0;
 }