drm/i915/cml: Add CML PCI IDS

Comet Lake is a Intel Processor containing Gen9
Intel HD Graphics. This patch adds the initial set of
PCI IDs. Comet Lake comes off of Coffee Lake - adding
the IDs to Coffee Lake ID list.

More support and features will be in the patches that follow.

v2: Split IDs according to GT. (Rodrigo)

v3: Update IDs.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190318200133.9666-1-anusha.srivatsa@intel.com

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index ef7410c492fd12f15eea4efbee9deece060fd18d..7a6054eadb8e99604140d019086ecc5093c3915a 100644 (file)
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -795,6 +795,8 @@ static const struct pci_device_id pciidlist[] = {
        INTEL_WHL_U_GT2_IDS(&intel_coffeelake_gt2_info),
        INTEL_AML_CFL_GT2_IDS(&intel_coffeelake_gt2_info),
        INTEL_WHL_U_GT3_IDS(&intel_coffeelake_gt3_info),
+       INTEL_CML_GT1_IDS(&intel_coffeelake_gt1_info),
+       INTEL_CML_GT2_IDS(&intel_coffeelake_gt2_info),
        INTEL_CNL_IDS(&intel_cannonlake_info),
        INTEL_ICL_11_IDS(&intel_icelake_11_info),
        {0, 0, 0}

diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index d200000feeaa22a70778a03b983d61bb40a4a0a3..291b5e3fa59ce1189a2502417a2723d92579f4ce 100644 (file)
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -373,6 +373,30 @@
 #define INTEL_AML_CFL_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x87CA, info)
 
+/* CML GT1 */
+#define INTEL_CML_GT1_IDS(info)        \
+       INTEL_VGA_DEVICE(0x9B21, info), \
+       INTEL_VGA_DEVICE(0x9BAA, info), \
+       INTEL_VGA_DEVICE(0x9BAB, info), \
+       INTEL_VGA_DEVICE(0x9BAC, info), \
+       INTEL_VGA_DEVICE(0x9BA0, info), \
+       INTEL_VGA_DEVICE(0x9BA5, info), \
+       INTEL_VGA_DEVICE(0x9BA8, info), \
+       INTEL_VGA_DEVICE(0x9BA4, info), \
+       INTEL_VGA_DEVICE(0x9BA2, info)
+
+/* CML GT2 */
+#define INTEL_CML_GT2_IDS(info)        \
+       INTEL_VGA_DEVICE(0x9B41, info), \
+       INTEL_VGA_DEVICE(0x9BCA, info), \
+       INTEL_VGA_DEVICE(0x9BCB, info), \
+       INTEL_VGA_DEVICE(0x9BCC, info), \
+       INTEL_VGA_DEVICE(0x9BC0, info), \
+       INTEL_VGA_DEVICE(0x9BC5, info), \
+       INTEL_VGA_DEVICE(0x9BC8, info), \
+       INTEL_VGA_DEVICE(0x9BC4, info), \
+       INTEL_VGA_DEVICE(0x9BC2, info)
+
 #define INTEL_KBL_IDS(info) \
        INTEL_KBL_GT1_IDS(info), \
        INTEL_KBL_GT2_IDS(info), \
@@ -436,7 +460,9 @@
        INTEL_WHL_U_GT1_IDS(info), \
        INTEL_WHL_U_GT2_IDS(info), \
        INTEL_WHL_U_GT3_IDS(info), \
-       INTEL_AML_CFL_GT2_IDS(info)
+       INTEL_AML_CFL_GT2_IDS(info), \
+       INTEL_CML_GT1_IDS(info), \
+       INTEL_CML_GT2_IDS(info)
 
 /* CNL */
 #define INTEL_CNL_IDS(info) \