hwmgr->adev = adev;
        hwmgr->not_vf = !amdgpu_sriov_vf(adev);
        hwmgr->device = amdgpu_cgs_create_device(adev);
-       mutex_init(&hwmgr->smu_lock);
        mutex_init(&hwmgr->msg_lock);
        hwmgr->chip_family = adev->family;
        hwmgr->chip_id = adev->asic_type;
        struct amdgpu_device *adev = handle;
        struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle;
 
-       if (hwmgr && hwmgr->pm_en) {
-               mutex_lock(&hwmgr->smu_lock);
+       if (hwmgr && hwmgr->pm_en)
                hwmgr_handle_task(hwmgr,
                                        AMD_PP_TASK_COMPLETE_INIT, NULL);
-               mutex_unlock(&hwmgr->smu_lock);
-       }
        if (adev->pm.smu_prv_buffer_size != 0)
                pp_reserve_vram_for_smu(adev);
 
        if (level == hwmgr->dpm_level)
                return 0;
 
-       mutex_lock(&hwmgr->smu_lock);
        pp_dpm_en_umd_pstate(hwmgr, &level);
        hwmgr->request_dpm_level = level;
        hwmgr_handle_task(hwmgr, AMD_PP_TASK_READJUST_POWER_STATE, NULL);
-       mutex_unlock(&hwmgr->smu_lock);
 
        return 0;
 }
                                                                void *handle)
 {
        struct pp_hwmgr *hwmgr = handle;
-       enum amd_dpm_forced_level level;
 
        if (!hwmgr || !hwmgr->pm_en)
                return -EINVAL;
 
-       mutex_lock(&hwmgr->smu_lock);
-       level = hwmgr->dpm_level;
-       mutex_unlock(&hwmgr->smu_lock);
-       return level;
+       return hwmgr->dpm_level;
 }
 
 static uint32_t pp_dpm_get_sclk(void *handle, bool low)
 {
        struct pp_hwmgr *hwmgr = handle;
-       uint32_t clk = 0;
 
        if (!hwmgr || !hwmgr->pm_en)
                return 0;
                pr_info_ratelimited("%s was not implemented.\n", __func__);
                return 0;
        }
-       mutex_lock(&hwmgr->smu_lock);
-       clk = hwmgr->hwmgr_func->get_sclk(hwmgr, low);
-       mutex_unlock(&hwmgr->smu_lock);
-       return clk;
+       return hwmgr->hwmgr_func->get_sclk(hwmgr, low);
 }
 
 static uint32_t pp_dpm_get_mclk(void *handle, bool low)
 {
        struct pp_hwmgr *hwmgr = handle;
-       uint32_t clk = 0;
 
        if (!hwmgr || !hwmgr->pm_en)
                return 0;
                pr_info_ratelimited("%s was not implemented.\n", __func__);
                return 0;
        }
-       mutex_lock(&hwmgr->smu_lock);
-       clk = hwmgr->hwmgr_func->get_mclk(hwmgr, low);
-       mutex_unlock(&hwmgr->smu_lock);
-       return clk;
+       return hwmgr->hwmgr_func->get_mclk(hwmgr, low);
 }
 
 static void pp_dpm_powergate_vce(void *handle, bool gate)
                pr_info_ratelimited("%s was not implemented.\n", __func__);
                return;
        }
-       mutex_lock(&hwmgr->smu_lock);
        hwmgr->hwmgr_func->powergate_vce(hwmgr, gate);
-       mutex_unlock(&hwmgr->smu_lock);
 }
 
 static void pp_dpm_powergate_uvd(void *handle, bool gate)
                pr_info_ratelimited("%s was not implemented.\n", __func__);
                return;
        }
-       mutex_lock(&hwmgr->smu_lock);
        hwmgr->hwmgr_func->powergate_uvd(hwmgr, gate);
-       mutex_unlock(&hwmgr->smu_lock);
 }
 
 static int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_task task_id,
                enum amd_pm_state_type *user_state)
 {
-       int ret = 0;
        struct pp_hwmgr *hwmgr = handle;
 
        if (!hwmgr || !hwmgr->pm_en)
                return -EINVAL;
 
-       mutex_lock(&hwmgr->smu_lock);
-       ret = hwmgr_handle_task(hwmgr, task_id, user_state);
-       mutex_unlock(&hwmgr->smu_lock);
-
-       return ret;
+       return hwmgr_handle_task(hwmgr, task_id, user_state);
 }
 
 static enum amd_pm_state_type pp_dpm_get_current_power_state(void *handle)
        if (!hwmgr || !hwmgr->pm_en || !hwmgr->current_ps)
                return -EINVAL;
 
-       mutex_lock(&hwmgr->smu_lock);
-
        state = hwmgr->current_ps;
 
        switch (state->classification.ui_label) {
                        pm_type = POWER_STATE_TYPE_DEFAULT;
                break;
        }
-       mutex_unlock(&hwmgr->smu_lock);
 
        return pm_type;
 }
        if (mode == U32_MAX)
                return -EINVAL;
 
-       mutex_lock(&hwmgr->smu_lock);
        hwmgr->hwmgr_func->set_fan_control_mode(hwmgr, mode);
-       mutex_unlock(&hwmgr->smu_lock);
 
        return 0;
 }
        if (!fan_mode)
                return -EINVAL;
 
-       mutex_lock(&hwmgr->smu_lock);
        *fan_mode = hwmgr->hwmgr_func->get_fan_control_mode(hwmgr);
-       mutex_unlock(&hwmgr->smu_lock);
        return 0;
 }
 
 static int pp_dpm_set_fan_speed_pwm(void *handle, uint32_t speed)
 {
        struct pp_hwmgr *hwmgr = handle;
-       int ret = 0;
 
        if (!hwmgr || !hwmgr->pm_en)
                return -EOPNOTSUPP;
        if (speed == U32_MAX)
                return -EINVAL;
 
-       mutex_lock(&hwmgr->smu_lock);
-       ret = hwmgr->hwmgr_func->set_fan_speed_pwm(hwmgr, speed);
-       mutex_unlock(&hwmgr->smu_lock);
-       return ret;
+       return hwmgr->hwmgr_func->set_fan_speed_pwm(hwmgr, speed);
 }
 
 static int pp_dpm_get_fan_speed_pwm(void *handle, uint32_t *speed)
 {
        struct pp_hwmgr *hwmgr = handle;
-       int ret = 0;
 
        if (!hwmgr || !hwmgr->pm_en)
                return -EOPNOTSUPP;
        if (!speed)
                return -EINVAL;
 
-       mutex_lock(&hwmgr->smu_lock);
-       ret = hwmgr->hwmgr_func->get_fan_speed_pwm(hwmgr, speed);
-       mutex_unlock(&hwmgr->smu_lock);
-       return ret;
+       return hwmgr->hwmgr_func->get_fan_speed_pwm(hwmgr, speed);
 }
 
 static int pp_dpm_get_fan_speed_rpm(void *handle, uint32_t *rpm)
 {
        struct pp_hwmgr *hwmgr = handle;
-       int ret = 0;
 
        if (!hwmgr || !hwmgr->pm_en)
                return -EOPNOTSUPP;
        if (!rpm)
                return -EINVAL;
 
-       mutex_lock(&hwmgr->smu_lock);
-       ret = hwmgr->hwmgr_func->get_fan_speed_rpm(hwmgr, rpm);
-       mutex_unlock(&hwmgr->smu_lock);
-       return ret;
+       return hwmgr->hwmgr_func->get_fan_speed_rpm(hwmgr, rpm);
 }
 
 static int pp_dpm_set_fan_speed_rpm(void *handle, uint32_t rpm)
 {
        struct pp_hwmgr *hwmgr = handle;
-       int ret = 0;
 
        if (!hwmgr || !hwmgr->pm_en)
                return -EOPNOTSUPP;
        if (rpm == U32_MAX)
                return -EINVAL;
 
-       mutex_lock(&hwmgr->smu_lock);
-       ret = hwmgr->hwmgr_func->set_fan_speed_rpm(hwmgr, rpm);
-       mutex_unlock(&hwmgr->smu_lock);
-       return ret;
+       return hwmgr->hwmgr_func->set_fan_speed_rpm(hwmgr, rpm);
 }
 
 static int pp_dpm_get_pp_num_states(void *handle,
        if (!hwmgr || !hwmgr->pm_en ||!hwmgr->ps)
                return -EINVAL;
 
-       mutex_lock(&hwmgr->smu_lock);
-
        data->nums = hwmgr->num_ps;
 
        for (i = 0; i < hwmgr->num_ps; i++) {
                                data->states[i] = POWER_STATE_TYPE_DEFAULT;
                }
        }
-       mutex_unlock(&hwmgr->smu_lock);
        return 0;
 }
 
 static int pp_dpm_get_pp_table(void *handle, char **table)
 {
        struct pp_hwmgr *hwmgr = handle;
-       int size = 0;
 
        if (!hwmgr || !hwmgr->pm_en ||!hwmgr->soft_pp_table)
                return -EINVAL;
 
-       mutex_lock(&hwmgr->smu_lock);
        *table = (char *)hwmgr->soft_pp_table;
-       size = hwmgr->soft_pp_table_size;
-       mutex_unlock(&hwmgr->smu_lock);
-       return size;
+       return hwmgr->soft_pp_table_size;
 }
 
 static int amd_powerplay_reset(void *handle)
        if (!hwmgr || !hwmgr->pm_en)
                return -EINVAL;
 
-       mutex_lock(&hwmgr->smu_lock);
        if (!hwmgr->hardcode_pp_table) {
                hwmgr->hardcode_pp_table = kmemdup(hwmgr->soft_pp_table,
                                                   hwmgr->soft_pp_table_size,
                                                   GFP_KERNEL);
                if (!hwmgr->hardcode_pp_table)
-                       goto err;
+                       return ret;
        }
 
        memcpy(hwmgr->hardcode_pp_table, buf, size);
 
        ret = amd_powerplay_reset(handle);
        if (ret)
-               goto err;
+               return ret;
 
-       if (hwmgr->hwmgr_func->avfs_control) {
+       if (hwmgr->hwmgr_func->avfs_control)
                ret = hwmgr->hwmgr_func->avfs_control(hwmgr, false);
-               if (ret)
-                       goto err;
-       }
-       mutex_unlock(&hwmgr->smu_lock);
-       return 0;
-err:
-       mutex_unlock(&hwmgr->smu_lock);
+
        return ret;
 }
 
                enum pp_clock_type type, uint32_t mask)
 {
        struct pp_hwmgr *hwmgr = handle;
-       int ret = 0;
 
        if (!hwmgr || !hwmgr->pm_en)
                return -EINVAL;
                return -EINVAL;
        }
 
-       mutex_lock(&hwmgr->smu_lock);
-       ret = hwmgr->hwmgr_func->force_clock_level(hwmgr, type, mask);
-       mutex_unlock(&hwmgr->smu_lock);
-       return ret;
+       return hwmgr->hwmgr_func->force_clock_level(hwmgr, type, mask);
 }
 
 static int pp_dpm_print_clock_levels(void *handle,
                enum pp_clock_type type, char *buf)
 {
        struct pp_hwmgr *hwmgr = handle;
-       int ret = 0;
 
        if (!hwmgr || !hwmgr->pm_en)
                return -EINVAL;
                pr_info_ratelimited("%s was not implemented.\n", __func__);
                return 0;
        }
-       mutex_lock(&hwmgr->smu_lock);
-       ret = hwmgr->hwmgr_func->print_clock_levels(hwmgr, type, buf);
-       mutex_unlock(&hwmgr->smu_lock);
-       return ret;
+       return hwmgr->hwmgr_func->print_clock_levels(hwmgr, type, buf);
 }
 
 static int pp_dpm_get_sclk_od(void *handle)
 {
        struct pp_hwmgr *hwmgr = handle;
-       int ret = 0;
 
        if (!hwmgr || !hwmgr->pm_en)
                return -EINVAL;
                pr_info_ratelimited("%s was not implemented.\n", __func__);
                return 0;
        }
-       mutex_lock(&hwmgr->smu_lock);
-       ret = hwmgr->hwmgr_func->get_sclk_od(hwmgr);
-       mutex_unlock(&hwmgr->smu_lock);
-       return ret;
+       return hwmgr->hwmgr_func->get_sclk_od(hwmgr);
 }
 
 static int pp_dpm_set_sclk_od(void *handle, uint32_t value)
 {
        struct pp_hwmgr *hwmgr = handle;
-       int ret = 0;
 
        if (!hwmgr || !hwmgr->pm_en)
                return -EINVAL;
                return 0;
        }
 
-       mutex_lock(&hwmgr->smu_lock);
-       ret = hwmgr->hwmgr_func->set_sclk_od(hwmgr, value);
-       mutex_unlock(&hwmgr->smu_lock);
-       return ret;
+       return hwmgr->hwmgr_func->set_sclk_od(hwmgr, value);
 }
 
 static int pp_dpm_get_mclk_od(void *handle)
 {
        struct pp_hwmgr *hwmgr = handle;
-       int ret = 0;
 
        if (!hwmgr || !hwmgr->pm_en)
                return -EINVAL;
                pr_info_ratelimited("%s was not implemented.\n", __func__);
                return 0;
        }
-       mutex_lock(&hwmgr->smu_lock);
-       ret = hwmgr->hwmgr_func->get_mclk_od(hwmgr);
-       mutex_unlock(&hwmgr->smu_lock);
-       return ret;
+       return hwmgr->hwmgr_func->get_mclk_od(hwmgr);
 }
 
 static int pp_dpm_set_mclk_od(void *handle, uint32_t value)
 {
        struct pp_hwmgr *hwmgr = handle;
-       int ret = 0;
 
        if (!hwmgr || !hwmgr->pm_en)
                return -EINVAL;
                pr_info_ratelimited("%s was not implemented.\n", __func__);
                return 0;
        }
-       mutex_lock(&hwmgr->smu_lock);
-       ret = hwmgr->hwmgr_func->set_mclk_od(hwmgr, value);
-       mutex_unlock(&hwmgr->smu_lock);
-       return ret;
+       return hwmgr->hwmgr_func->set_mclk_od(hwmgr, value);
 }
 
 static int pp_dpm_read_sensor(void *handle, int idx,
                              void *value, int *size)
 {
        struct pp_hwmgr *hwmgr = handle;
-       int ret = 0;
 
        if (!hwmgr || !hwmgr->pm_en || !value)
                return -EINVAL;
                *((uint32_t *)value) = hwmgr->thermal_controller.fanInfo.ulMaxRPM;
                return 0;
        default:
-               mutex_lock(&hwmgr->smu_lock);
-               ret = hwmgr->hwmgr_func->read_sensor(hwmgr, idx, value, size);
-               mutex_unlock(&hwmgr->smu_lock);
-               return ret;
+               return hwmgr->hwmgr_func->read_sensor(hwmgr, idx, value, size);
        }
 }
 
 static int pp_get_power_profile_mode(void *handle, char *buf)
 {
        struct pp_hwmgr *hwmgr = handle;
-       int ret;
 
        if (!hwmgr || !hwmgr->pm_en || !hwmgr->hwmgr_func->get_power_profile_mode)
                return -EOPNOTSUPP;
        if (!buf)
                return -EINVAL;
 
-       mutex_lock(&hwmgr->smu_lock);
-       ret = hwmgr->hwmgr_func->get_power_profile_mode(hwmgr, buf);
-       mutex_unlock(&hwmgr->smu_lock);
-       return ret;
+       return hwmgr->hwmgr_func->get_power_profile_mode(hwmgr, buf);
 }
 
 static int pp_set_power_profile_mode(void *handle, long *input, uint32_t size)
 {
        struct pp_hwmgr *hwmgr = handle;
-       int ret = -EOPNOTSUPP;
 
        if (!hwmgr || !hwmgr->pm_en || !hwmgr->hwmgr_func->set_power_profile_mode)
-               return ret;
+               return -EOPNOTSUPP;
 
        if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) {
                pr_debug("power profile setting is for manual dpm mode only.\n");
                return -EINVAL;
        }
 
-       mutex_lock(&hwmgr->smu_lock);
-       ret = hwmgr->hwmgr_func->set_power_profile_mode(hwmgr, input, size);
-       mutex_unlock(&hwmgr->smu_lock);
-       return ret;
+       return hwmgr->hwmgr_func->set_power_profile_mode(hwmgr, input, size);
 }
 
 static int pp_set_fine_grain_clk_vol(void *handle, uint32_t type, long *input, uint32_t size)
        if (!(type < PP_SMC_POWER_PROFILE_CUSTOM))
                return -EINVAL;
 
-       mutex_lock(&hwmgr->smu_lock);
-
        if (!en) {
                hwmgr->workload_mask &= ~(1 << hwmgr->workload_prority[type]);
                index = fls(hwmgr->workload_mask);
 
        if (type == PP_SMC_POWER_PROFILE_COMPUTE &&
                hwmgr->hwmgr_func->disable_power_features_for_compute_performance) {
-                       if (hwmgr->hwmgr_func->disable_power_features_for_compute_performance(hwmgr, en)) {
-                               mutex_unlock(&hwmgr->smu_lock);
+                       if (hwmgr->hwmgr_func->disable_power_features_for_compute_performance(hwmgr, en))
                                return -EINVAL;
-                       }
        }
 
        if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL)
                hwmgr->hwmgr_func->set_power_profile_mode(hwmgr, &workload, 0);
-       mutex_unlock(&hwmgr->smu_lock);
 
        return 0;
 }
        if (limit > max_power_limit)
                return -EINVAL;
 
-       mutex_lock(&hwmgr->smu_lock);
        hwmgr->hwmgr_func->set_power_limit(hwmgr, limit);
        hwmgr->power_limit = limit;
-       mutex_unlock(&hwmgr->smu_lock);
        return 0;
 }
 
        if (power_type != PP_PWR_TYPE_SUSTAINED)
                return -EOPNOTSUPP;
 
-       mutex_lock(&hwmgr->smu_lock);
-
        switch (pp_limit_level) {
                case PP_PWR_LIMIT_CURRENT:
                        *limit = hwmgr->power_limit;
                        break;
        }
 
-       mutex_unlock(&hwmgr->smu_lock);
-
        return ret;
 }
 
        if (!hwmgr || !hwmgr->pm_en)
                return -EINVAL;
 
-       mutex_lock(&hwmgr->smu_lock);
        phm_store_dal_configuration_data(hwmgr, display_config);
-       mutex_unlock(&hwmgr->smu_lock);
        return 0;
 }
 
                struct amd_pp_simple_clock_info *output)
 {
        struct pp_hwmgr *hwmgr = handle;
-       int ret = 0;
 
        if (!hwmgr || !hwmgr->pm_en ||!output)
                return -EINVAL;
 
-       mutex_lock(&hwmgr->smu_lock);
-       ret = phm_get_dal_power_level(hwmgr, output);
-       mutex_unlock(&hwmgr->smu_lock);
-       return ret;
+       return phm_get_dal_power_level(hwmgr, output);
 }
 
 static int pp_get_current_clocks(void *handle,
        if (!hwmgr || !hwmgr->pm_en)
                return -EINVAL;
 
-       mutex_lock(&hwmgr->smu_lock);
-
        phm_get_dal_power_level(hwmgr, &simple_clocks);
 
        if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
 
        if (ret) {
                pr_debug("Error in phm_get_clock_info \n");
-               mutex_unlock(&hwmgr->smu_lock);
                return -EINVAL;
        }
 
                clocks->max_engine_clock_in_sr = hw_clocks.max_eng_clk;
                clocks->min_engine_clock_in_sr = hw_clocks.min_eng_clk;
        }
-       mutex_unlock(&hwmgr->smu_lock);
        return 0;
 }
 
 static int pp_get_clock_by_type(void *handle, enum amd_pp_clock_type type, struct amd_pp_clocks *clocks)
 {
        struct pp_hwmgr *hwmgr = handle;
-       int ret = 0;
 
        if (!hwmgr || !hwmgr->pm_en)
                return -EINVAL;
        if (clocks == NULL)
                return -EINVAL;
 
-       mutex_lock(&hwmgr->smu_lock);
-       ret = phm_get_clock_by_type(hwmgr, type, clocks);
-       mutex_unlock(&hwmgr->smu_lock);
-       return ret;
+       return phm_get_clock_by_type(hwmgr, type, clocks);
 }
 
 static int pp_get_clock_by_type_with_latency(void *handle,
                struct pp_clock_levels_with_latency *clocks)
 {
        struct pp_hwmgr *hwmgr = handle;
-       int ret = 0;
 
        if (!hwmgr || !hwmgr->pm_en ||!clocks)
                return -EINVAL;
 
-       mutex_lock(&hwmgr->smu_lock);
-       ret = phm_get_clock_by_type_with_latency(hwmgr, type, clocks);
-       mutex_unlock(&hwmgr->smu_lock);
-       return ret;
+       return phm_get_clock_by_type_with_latency(hwmgr, type, clocks);
 }
 
 static int pp_get_clock_by_type_with_voltage(void *handle,
                struct pp_clock_levels_with_voltage *clocks)
 {
        struct pp_hwmgr *hwmgr = handle;
-       int ret = 0;
 
        if (!hwmgr || !hwmgr->pm_en ||!clocks)
                return -EINVAL;
 
-       mutex_lock(&hwmgr->smu_lock);
-
-       ret = phm_get_clock_by_type_with_voltage(hwmgr, type, clocks);
-
-       mutex_unlock(&hwmgr->smu_lock);
-       return ret;
+       return phm_get_clock_by_type_with_voltage(hwmgr, type, clocks);
 }
 
 static int pp_set_watermarks_for_clocks_ranges(void *handle,
                void *clock_ranges)
 {
        struct pp_hwmgr *hwmgr = handle;
-       int ret = 0;
 
        if (!hwmgr || !hwmgr->pm_en || !clock_ranges)
                return -EINVAL;
 
-       mutex_lock(&hwmgr->smu_lock);
-       ret = phm_set_watermarks_for_clocks_ranges(hwmgr,
-                       clock_ranges);
-       mutex_unlock(&hwmgr->smu_lock);
-
-       return ret;
+       return phm_set_watermarks_for_clocks_ranges(hwmgr,
+                                                   clock_ranges);
 }
 
 static int pp_display_clock_voltage_request(void *handle,
                struct pp_display_clock_request *clock)
 {
        struct pp_hwmgr *hwmgr = handle;
-       int ret = 0;
 
        if (!hwmgr || !hwmgr->pm_en ||!clock)
                return -EINVAL;
 
-       mutex_lock(&hwmgr->smu_lock);
-       ret = phm_display_clock_voltage_request(hwmgr, clock);
-       mutex_unlock(&hwmgr->smu_lock);
-
-       return ret;
+       return phm_display_clock_voltage_request(hwmgr, clock);
 }
 
 static int pp_get_display_mode_validation_clocks(void *handle,
 
        clocks->level = PP_DAL_POWERLEVEL_7;
 
-       mutex_lock(&hwmgr->smu_lock);
-
        if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_DynamicPatchPowerState))
                ret = phm_get_max_high_clocks(hwmgr, clocks);
 
-       mutex_unlock(&hwmgr->smu_lock);
        return ret;
 }
 
                return -EINVAL;
        }
 
-       mutex_lock(&hwmgr->smu_lock);
        hwmgr->hwmgr_func->smus_notify_pwe(hwmgr);
-       mutex_unlock(&hwmgr->smu_lock);
 
        return 0;
 }
             hwmgr->hwmgr_func->enable_mgpu_fan_boost == NULL)
                return 0;
 
-       mutex_lock(&hwmgr->smu_lock);
        hwmgr->hwmgr_func->enable_mgpu_fan_boost(hwmgr);
-       mutex_unlock(&hwmgr->smu_lock);
 
        return 0;
 }
                return -EINVAL;
        }
 
-       mutex_lock(&hwmgr->smu_lock);
        hwmgr->hwmgr_func->set_min_deep_sleep_dcefclk(hwmgr, clock);
-       mutex_unlock(&hwmgr->smu_lock);
 
        return 0;
 }
                return -EINVAL;
        }
 
-       mutex_lock(&hwmgr->smu_lock);
        hwmgr->hwmgr_func->set_hard_min_dcefclk_by_freq(hwmgr, clock);
-       mutex_unlock(&hwmgr->smu_lock);
 
        return 0;
 }
                return -EINVAL;
        }
 
-       mutex_lock(&hwmgr->smu_lock);
        hwmgr->hwmgr_func->set_hard_min_fclk_by_freq(hwmgr, clock);
-       mutex_unlock(&hwmgr->smu_lock);
 
        return 0;
 }
 static int pp_set_active_display_count(void *handle, uint32_t count)
 {
        struct pp_hwmgr *hwmgr = handle;
-       int ret = 0;
 
        if (!hwmgr || !hwmgr->pm_en)
                return -EINVAL;
 
-       mutex_lock(&hwmgr->smu_lock);
-       ret = phm_set_active_display_count(hwmgr, count);
-       mutex_unlock(&hwmgr->smu_lock);
-
-       return ret;
+       return phm_set_active_display_count(hwmgr, count);
 }
 
 static int pp_get_asic_baco_capability(void *handle, bool *cap)
                !hwmgr->hwmgr_func->get_asic_baco_capability)
                return 0;
 
-       mutex_lock(&hwmgr->smu_lock);
        hwmgr->hwmgr_func->get_asic_baco_capability(hwmgr, cap);
-       mutex_unlock(&hwmgr->smu_lock);
 
        return 0;
 }
        if (!hwmgr->pm_en || !hwmgr->hwmgr_func->get_asic_baco_state)
                return 0;
 
-       mutex_lock(&hwmgr->smu_lock);
        hwmgr->hwmgr_func->get_asic_baco_state(hwmgr, (enum BACO_STATE *)state);
-       mutex_unlock(&hwmgr->smu_lock);
 
        return 0;
 }
                !hwmgr->hwmgr_func->set_asic_baco_state)
                return 0;
 
-       mutex_lock(&hwmgr->smu_lock);
        hwmgr->hwmgr_func->set_asic_baco_state(hwmgr, (enum BACO_STATE)state);
-       mutex_unlock(&hwmgr->smu_lock);
 
        return 0;
 }
 static int pp_get_ppfeature_status(void *handle, char *buf)
 {
        struct pp_hwmgr *hwmgr = handle;
-       int ret = 0;
 
        if (!hwmgr || !hwmgr->pm_en || !buf)
                return -EINVAL;
                return -EINVAL;
        }
 
-       mutex_lock(&hwmgr->smu_lock);
-       ret = hwmgr->hwmgr_func->get_ppfeature_status(hwmgr, buf);
-       mutex_unlock(&hwmgr->smu_lock);
-
-       return ret;
+       return hwmgr->hwmgr_func->get_ppfeature_status(hwmgr, buf);
 }
 
 static int pp_set_ppfeature_status(void *handle, uint64_t ppfeature_masks)
 {
        struct pp_hwmgr *hwmgr = handle;
-       int ret = 0;
 
        if (!hwmgr || !hwmgr->pm_en)
                return -EINVAL;
                return -EINVAL;
        }
 
-       mutex_lock(&hwmgr->smu_lock);
-       ret = hwmgr->hwmgr_func->set_ppfeature_status(hwmgr, ppfeature_masks);
-       mutex_unlock(&hwmgr->smu_lock);
-
-       return ret;
+       return hwmgr->hwmgr_func->set_ppfeature_status(hwmgr, ppfeature_masks);
 }
 
 static int pp_asic_reset_mode_2(void *handle)
 {
        struct pp_hwmgr *hwmgr = handle;
-       int ret = 0;
 
        if (!hwmgr || !hwmgr->pm_en)
                return -EINVAL;
                return -EINVAL;
        }
 
-       mutex_lock(&hwmgr->smu_lock);
-       ret = hwmgr->hwmgr_func->asic_reset(hwmgr, SMU_ASIC_RESET_MODE_2);
-       mutex_unlock(&hwmgr->smu_lock);
-
-       return ret;
+       return hwmgr->hwmgr_func->asic_reset(hwmgr, SMU_ASIC_RESET_MODE_2);
 }
 
 static int pp_smu_i2c_bus_access(void *handle, bool acquire)
 {
        struct pp_hwmgr *hwmgr = handle;
-       int ret = 0;
 
        if (!hwmgr || !hwmgr->pm_en)
                return -EINVAL;
                return -EINVAL;
        }
 
-       mutex_lock(&hwmgr->smu_lock);
-       ret = hwmgr->hwmgr_func->smu_i2c_bus_access(hwmgr, acquire);
-       mutex_unlock(&hwmgr->smu_lock);
-
-       return ret;
+       return hwmgr->hwmgr_func->smu_i2c_bus_access(hwmgr, acquire);
 }
 
 static int pp_set_df_cstate(void *handle, enum pp_df_cstate state)
        if (!hwmgr->pm_en || !hwmgr->hwmgr_func->set_df_cstate)
                return 0;
 
-       mutex_lock(&hwmgr->smu_lock);
        hwmgr->hwmgr_func->set_df_cstate(hwmgr, state);
-       mutex_unlock(&hwmgr->smu_lock);
 
        return 0;
 }
        if (!hwmgr->pm_en || !hwmgr->hwmgr_func->set_xgmi_pstate)
                return 0;
 
-       mutex_lock(&hwmgr->smu_lock);
        hwmgr->hwmgr_func->set_xgmi_pstate(hwmgr, pstate);
-       mutex_unlock(&hwmgr->smu_lock);
 
        return 0;
 }
 static ssize_t pp_get_gpu_metrics(void *handle, void **table)
 {
        struct pp_hwmgr *hwmgr = handle;
-       ssize_t size;
 
        if (!hwmgr)
                return -EINVAL;
        if (!hwmgr->pm_en || !hwmgr->hwmgr_func->get_gpu_metrics)
                return -EOPNOTSUPP;
 
-       mutex_lock(&hwmgr->smu_lock);
-       size = hwmgr->hwmgr_func->get_gpu_metrics(hwmgr, table);
-       mutex_unlock(&hwmgr->smu_lock);
-
-       return size;
+       return hwmgr->hwmgr_func->get_gpu_metrics(hwmgr, table);
 }
 
 static int pp_gfx_state_change_set(void *handle, uint32_t state)
                return -EINVAL;
        }
 
-       mutex_lock(&hwmgr->smu_lock);
        hwmgr->hwmgr_func->gfx_state_change(hwmgr, state);
-       mutex_unlock(&hwmgr->smu_lock);
        return 0;
 }
 
 
        *addr = NULL;
        *size = 0;
-       mutex_lock(&hwmgr->smu_lock);
        if (adev->pm.smu_prv_buffer) {
                amdgpu_bo_kmap(adev->pm.smu_prv_buffer, addr);
                *size = adev->pm.smu_prv_buffer_size;
        }
-       mutex_unlock(&hwmgr->smu_lock);
 
        return 0;
 }