.ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
                .single_pdev_only = false,
                .rxdma1_enable = true,
-               .num_rxmda_per_pdev = 1,
+               .num_rxdma_per_pdev = 1,
                .rx_mac_buf_ring = false,
                .vdev_start_delay = false,
                .htt_peer_map_v2 = true,
                .ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
                .single_pdev_only = false,
                .rxdma1_enable = true,
-               .num_rxmda_per_pdev = 1,
+               .num_rxdma_per_pdev = 1,
                .rx_mac_buf_ring = false,
                .vdev_start_delay = false,
                .htt_peer_map_v2 = true,
                .ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
                .single_pdev_only = true,
                .rxdma1_enable = false,
-               .num_rxmda_per_pdev = 2,
+               .num_rxdma_per_pdev = 2,
                .rx_mac_buf_ring = true,
                .vdev_start_delay = true,
                .htt_peer_map_v2 = false,
                .svc_to_ce_map_len = 18,
                .ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
                .rxdma1_enable = true,
-               .num_rxmda_per_pdev = 1,
+               .num_rxdma_per_pdev = 1,
                .rx_mac_buf_ring = false,
                .vdev_start_delay = false,
                .htt_peer_map_v2 = true,
                .ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
                .single_pdev_only = true,
                .rxdma1_enable = false,
-               .num_rxmda_per_pdev = 2,
+               .num_rxdma_per_pdev = 2,
                .rx_mac_buf_ring = true,
                .vdev_start_delay = true,
                .htt_peer_map_v2 = false,
                .svc_to_ce_map_len = 14,
                .single_pdev_only = true,
                .rxdma1_enable = false,
-               .num_rxmda_per_pdev = 2,
+               .num_rxdma_per_pdev = 2,
                .rx_mac_buf_ring = true,
                .vdev_start_delay = true,
                .htt_peer_map_v2 = false,
                .ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
                .single_pdev_only = true,
                .rxdma1_enable = false,
-               .num_rxmda_per_pdev = 1,
+               .num_rxdma_per_pdev = 1,
                .rx_mac_buf_ring = true,
                .vdev_start_delay = true,
                .htt_peer_map_v2 = false,
                .ce_ie_addr = &ath11k_ce_ie_addr_ipq5018,
                .ce_remap = &ath11k_ce_remap_ipq5018,
                .rxdma1_enable = true,
-               .num_rxmda_per_pdev = RXDMA_PER_PDEV_5018,
+               .num_rxdma_per_pdev = RXDMA_PER_PDEV_5018,
                .rx_mac_buf_ring = false,
                .vdev_start_delay = false,
                .htt_peer_map_v2 = true,
                .ce_ie_addr = &ath11k_ce_ie_addr_ipq8074,
                .single_pdev_only = true,
                .rxdma1_enable = false,
-               .num_rxmda_per_pdev = 2,
+               .num_rxdma_per_pdev = 2,
                .rx_mac_buf_ring = true,
                .vdev_start_delay = true,
                .htt_peer_map_v2 = false,
        }
 
        /* put hardware to DBS mode */
-       if (ab->hw_params.single_pdev_only && ab->hw_params.num_rxmda_per_pdev > 1) {
+       if (ab->hw_params.single_pdev_only && ab->hw_params.num_rxdma_per_pdev > 1) {
                ret = ath11k_wmi_set_hw_mode(ab, WMI_HOST_HW_MODE_DBS);
                if (ret) {
                        ath11k_err(ab, "failed to send dbs mode: %d\n", ret);
 
 
        ar->debug.rx_filter = tlv_filter.rx_filter;
 
-       for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
+       for (i = 0; i < ab->hw_params.num_rxdma_per_pdev; i++) {
                ring_id = ar->dp.rx_mon_status_refill_ring[i].refill_buf_ring.ring_id;
                ret = ath11k_dp_tx_htt_rx_filter_setup(ar->ab, ring_id, ar->dp.mac_id,
                                                       HAL_RXDMA_MONITOR_STATUS,
        }
 
        /* Clear rx filter set for monitor mode and rx status */
-       for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
+       for (i = 0; i < ab->hw_params.num_rxdma_per_pdev; i++) {
                ring_id = ar->dp.rx_mon_status_refill_ring[i].refill_buf_ring.ring_id;
                ret = ath11k_dp_tx_htt_rx_filter_setup(ar->ab, ring_id, ar->dp.mac_id,
                                                       HAL_RXDMA_MONITOR_STATUS,
                                               HTT_RX_FP_DATA_FILTER_FLASG3;
        }
 
-       for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
+       for (i = 0; i < ab->hw_params.num_rxdma_per_pdev; i++) {
                ring_id = ar->dp.rx_mon_status_refill_ring[i].refill_buf_ring.ring_id;
                ret = ath11k_dp_tx_htt_rx_filter_setup(ab, ring_id,
                                                       ar->dp.mac_id + i,
 
 // SPDX-License-Identifier: BSD-3-Clause-Clear
 /*
  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
- * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
 #include <crypto/hash.h>
 
        if (ab->hw_params.ring_mask->rx_mon_status[grp_id]) {
                for (i = 0; i < ab->num_radios; i++) {
-                       for (j = 0; j < ab->hw_params.num_rxmda_per_pdev; j++) {
-                               int id = i * ab->hw_params.num_rxmda_per_pdev + j;
+                       for (j = 0; j < ab->hw_params.num_rxdma_per_pdev; j++) {
+                               int id = i * ab->hw_params.num_rxdma_per_pdev + j;
 
                                if (ab->hw_params.ring_mask->rx_mon_status[grp_id] &
                                        BIT(id)) {
                ath11k_dp_process_reo_status(ab);
 
        for (i = 0; i < ab->num_radios; i++) {
-               for (j = 0; j < ab->hw_params.num_rxmda_per_pdev; j++) {
-                       int id = i * ab->hw_params.num_rxmda_per_pdev + j;
+               for (j = 0; j < ab->hw_params.num_rxdma_per_pdev; j++) {
+                       int id = i * ab->hw_params.num_rxdma_per_pdev + j;
 
                        if (ab->hw_params.ring_mask->rxdma2host[grp_id] & BIT(id)) {
                                work_done = ath11k_dp_process_rxdma_err(ab, id, budget);
                spin_lock_init(&dp->rx_refill_buf_ring.idr_lock);
                atomic_set(&dp->num_tx_pending, 0);
                init_waitqueue_head(&dp->tx_empty_waitq);
-               for (j = 0; j < ab->hw_params.num_rxmda_per_pdev; j++) {
+               for (j = 0; j < ab->hw_params.num_rxdma_per_pdev; j++) {
                        idr_init(&dp->rx_mon_status_refill_ring[j].bufs_idr);
                        spin_lock_init(&dp->rx_mon_status_refill_ring[j].idr_lock);
                }
 
        struct ath11k_base *ab = from_timer(ab, t, mon_reap_timer);
        int i;
 
-       for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++)
+       for (i = 0; i < ab->hw_params.num_rxdma_per_pdev; i++)
                ath11k_dp_rx_process_mon_rings(ab, i, NULL, DP_MON_SERVICE_BUDGET);
 
        mod_timer(&ab->mon_reap_timer, jiffies +
        unsigned long timeout = jiffies + msecs_to_jiffies(DP_MON_PURGE_TIMEOUT_MS);
 
        do {
-               for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++)
+               for (i = 0; i < ab->hw_params.num_rxdma_per_pdev; i++)
                        reaped += ath11k_dp_rx_process_mon_rings(ab, i,
                                                                 NULL,
                                                                 DP_MON_SERVICE_BUDGET);
        rx_ring = &dp->rxdma_mon_buf_ring;
        ath11k_dp_rxdma_buf_ring_free(ar, rx_ring);
 
-       for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
+       for (i = 0; i < ab->hw_params.num_rxdma_per_pdev; i++) {
                rx_ring = &dp->rx_mon_status_refill_ring[i];
                ath11k_dp_rxdma_buf_ring_free(ar, rx_ring);
        }
                ath11k_dp_rxdma_ring_buf_setup(ar, rx_ring, HAL_RXDMA_MONITOR_BUF);
        }
 
-       for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
+       for (i = 0; i < ab->hw_params.num_rxdma_per_pdev; i++) {
                rx_ring = &dp->rx_mon_status_refill_ring[i];
                ath11k_dp_rxdma_ring_buf_setup(ar, rx_ring, HAL_RXDMA_MONITOR_STATUS);
        }
 
        ath11k_dp_srng_cleanup(ab, &dp->rx_refill_buf_ring.refill_buf_ring);
 
-       for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
+       for (i = 0; i < ab->hw_params.num_rxdma_per_pdev; i++) {
                if (ab->hw_params.rx_mac_buf_ring)
                        ath11k_dp_srng_cleanup(ab, &dp->rx_mac_buf_ring[i]);
 
        }
 
        if (ar->ab->hw_params.rx_mac_buf_ring) {
-               for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
+               for (i = 0; i < ab->hw_params.num_rxdma_per_pdev; i++) {
                        ret = ath11k_dp_srng_setup(ar->ab,
                                                   &dp->rx_mac_buf_ring[i],
                                                   HAL_RXDMA_BUF, 1,
                }
        }
 
-       for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
+       for (i = 0; i < ab->hw_params.num_rxdma_per_pdev; i++) {
                ret = ath11k_dp_srng_setup(ar->ab, &dp->rxdma_err_dst_ring[i],
                                           HAL_RXDMA_DST, 0, dp->mac_id + i,
                                           DP_RXDMA_ERR_DST_RING_SIZE);
                }
        }
 
-       for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
+       for (i = 0; i < ab->hw_params.num_rxdma_per_pdev; i++) {
                srng = &dp->rx_mon_status_refill_ring[i].refill_buf_ring;
                ret = ath11k_dp_srng_setup(ar->ab,
                                           srng,
        }
 
        if (ab->hw_params.rx_mac_buf_ring) {
-               for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
+               for (i = 0; i < ab->hw_params.num_rxdma_per_pdev; i++) {
                        ring_id = dp->rx_mac_buf_ring[i].ring_id;
                        ret = ath11k_dp_tx_htt_srng_setup(ab, ring_id,
                                                          mac_id + i, HAL_RXDMA_BUF);
                }
        }
 
-       for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
+       for (i = 0; i < ab->hw_params.num_rxdma_per_pdev; i++) {
                ring_id = dp->rxdma_err_dst_ring[i].ring_id;
                ret = ath11k_dp_tx_htt_srng_setup(ab, ring_id,
                                                  mac_id + i, HAL_RXDMA_DST);
        }
 
 config_refill_ring:
-       for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
+       for (i = 0; i < ab->hw_params.num_rxdma_per_pdev; i++) {
                ring_id = dp->rx_mon_status_refill_ring[i].refill_buf_ring.ring_id;
                ret = ath11k_dp_tx_htt_srng_setup(ab, ring_id, mac_id + i,
                                                  HAL_RXDMA_MONITOR_STATUS);
 
        int ret;
        int i;
 
-       for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
+       for (i = 0; i < ab->hw_params.num_rxdma_per_pdev; i++) {
                skb = ath11k_htc_alloc_skb(ab, len);
                if (!skb)
                        return -ENOMEM;
                                                       &tlv_filter);
        } else if (!reset) {
                /* set in monitor mode only */
-               for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
+               for (i = 0; i < ab->hw_params.num_rxdma_per_pdev; i++) {
                        ring_id = dp->rx_mac_buf_ring[i].ring_id;
                        ret = ath11k_dp_tx_htt_rx_filter_setup(ar->ab, ring_id,
                                                               dp->mac_id + i,
        if (ret)
                return ret;
 
-       for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
+       for (i = 0; i < ab->hw_params.num_rxdma_per_pdev; i++) {
                ring_id = dp->rx_mon_status_refill_ring[i].refill_buf_ring.ring_id;
                if (!reset) {
                        tlv_filter.rx_filter =
 
 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
 /*
  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
- * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
 #ifndef ATH11K_HW_H
        bool single_pdev_only;
 
        bool rxdma1_enable;
-       int num_rxmda_per_pdev;
+       int num_rxdma_per_pdev;
        bool rx_mac_buf_ring;
        bool vdev_start_delay;
        bool htt_peer_map_v2;
 
                        tlv_filter.rx_filter = ath11k_debugfs_rx_filter(ar);
        }
 
-       for (i = 0; i < ab->hw_params.num_rxmda_per_pdev; i++) {
+       for (i = 0; i < ab->hw_params.num_rxdma_per_pdev; i++) {
                ring_id = ar->dp.rx_mon_status_refill_ring[i].refill_buf_ring.ring_id;
                ret = ath11k_dp_tx_htt_rx_filter_setup(ar->ab, ring_id,
                                                       ar->dp.mac_id + i,
 
 // SPDX-License-Identifier: BSD-3-Clause-Clear
 /*
  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
- * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 #include <linux/rtnetlink.h>
 
                ath11k_reg_reset_info(reg_info);
 
                if (ab->hw_params.single_pdev_only &&
-                   pdev_idx < ab->hw_params.num_rxmda_per_pdev)
+                   pdev_idx < ab->hw_params.num_rxdma_per_pdev)
                        return 0;
                goto fallback;
        }
 
        ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_MAX;
 
        /* It's overwritten when service_ext_ready is handled */
-       if (ab->hw_params.single_pdev_only && ab->hw_params.num_rxmda_per_pdev > 1)
+       if (ab->hw_params.single_pdev_only && ab->hw_params.num_rxdma_per_pdev > 1)
                ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_SINGLE;
 
        /* TODO: Init remaining wmi soc resources required */