x86/bugs/IBRS: Keep SSBD mitigation in effect if spectre_v2=ibrs is selected

From: Boris Ostrovsky <boris.ostrovsky@oracle.com>

If the system admins picks to disable memory disambiguation at bootup
(spec_store_bypass_disable=on) and enable IBRS (spectre_v2=ibrs) we
end up briefly at bootup disabling memory disambiguation and then
IBRS SPEC_CTRL kicks - and memory disambiguation is enabled back again.

The logic is there for the 'auto' case, but we missed it for
the other ones. Lets fix it up.

OraBug: 28071800

Fixes: 89981b51b9240ec16e506304990ce2311e93285b ("x86/speculation: Add prctl for Speculative Store Bypass mitigation")
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Mihai Carabas <mihai.carabas@oracle.com>
Reviewed-by: Darren Kenny <darren.kenny@oracle.com>
Signed-off-by: Brian Maly <brian.maly@oracle.com>

diff --git a/arch/x86/kernel/cpu/bugs_64.c b/arch/x86/kernel/cpu/bugs_64.c
index a218a654b2791898ea5a340b6ea0bc7547ce9915..d5989fbdfdb469373a4bb5e3c36e4707eb5bcb9a 100644 (file)
--- a/arch/x86/kernel/cpu/bugs_64.c
+++ b/arch/x86/kernel/cpu/bugs_64.c
@@ -804,6 +804,23 @@ static enum ssb_mitigation __init __ssb_select_mitigation(void)
                break;
        }
 
+       if (spectre_v2_enabled == SPECTRE_V2_IBRS) {
+               switch (mode) {
+               case SPEC_STORE_BYPASS_SECCOMP:
+               case SPEC_STORE_BYPASS_PRCTL:
+                       /* Not much we can do except switch the mode to userspace. */
+                       pr_info("from '%s' to '%s' as IBRS is enabled\n",
+                               ssb_strings[mode], ssb_strings[SPEC_STORE_BYPASS_USERSPACE]);
+                       mode = SPEC_STORE_BYPASS_USERSPACE;
+                       break;
+               case SPEC_STORE_BYPASS_DISABLE:
+                       /* Need to set the x86_spec_ctrl_mask and friends. */
+                       break;
+               default:
+                       break;
+               }
+       }
+
        /*
         * We have three CPU feature flags that are in play here:
         *  - X86_BUG_SPEC_STORE_BYPASS - CPU is susceptible.
@@ -824,8 +841,12 @@ static enum ssb_mitigation __init __ssb_select_mitigation(void)
                        x86_spec_ctrl_base |= SPEC_CTRL_SSBD;
                        x86_spec_ctrl_mask |= SPEC_CTRL_SSBD;
 
-                       if (mode == SPEC_STORE_BYPASS_DISABLE)
+                       if (mode == SPEC_STORE_BYPASS_DISABLE) {
                                x86_spec_ctrl_set(SPEC_CTRL_SSBD);
+                               if (spectre_v2_enabled == SPECTRE_V2_IBRS) {
+                                       x86_spec_ctrl_priv |= SPEC_CTRL_SSBD;
+                               }
+                       }
                        else
                                x86_spec_ctrl_priv &= ~(SPEC_CTRL_SSBD);
                        break;