drm: bridge: samsung-dsim: fix blanking packet size calculation

Scale the blanking packet sizes to match the ratio between HS clock
and DPI interface clock. The controller seems to do internal scaling
to the number of active lanes, so we don't take those into account.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # imx8mm-icore
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20230526030559.326566-2-aford173@gmail.com

diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c
index d038f6226c7773188e7496a829836baac6e18071..7b6d5dfc4f0d17f00170eddf5b97fbdd16e7dbbc 100644 (file)
--- a/drivers/gpu/drm/bridge/samsung-dsim.c
+++ b/drivers/gpu/drm/bridge/samsung-dsim.c
@@ -885,17 +885,29 @@ static void samsung_dsim_set_display_mode(struct samsung_dsim *dsi)
        u32 reg;
 
        if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO) {
+               int byte_clk_khz = dsi->burst_clk_rate / 1000 / 8;
+               int hfp = (m->hsync_start - m->hdisplay) * byte_clk_khz / m->clock;
+               int hbp = (m->htotal - m->hsync_end) * byte_clk_khz / m->clock;
+               int hsa = (m->hsync_end - m->hsync_start) * byte_clk_khz / m->clock;
+
+               /* remove packet overhead when possible */
+               hfp = max(hfp - 6, 0);
+               hbp = max(hbp - 6, 0);
+               hsa = max(hsa - 6, 0);
+
+               dev_dbg(dsi->dev, "calculated hfp: %u, hbp: %u, hsa: %u",
+                       hfp, hbp, hsa);
+
                reg = DSIM_CMD_ALLOW(0xf)
                        | DSIM_STABLE_VFP(m->vsync_start - m->vdisplay)
                        | DSIM_MAIN_VBP(m->vtotal - m->vsync_end);
                samsung_dsim_write(dsi, DSIM_MVPORCH_REG, reg);
 
-               reg = DSIM_MAIN_HFP(m->hsync_start - m->hdisplay)
-                       | DSIM_MAIN_HBP(m->htotal - m->hsync_end);
+               reg = DSIM_MAIN_HFP(hfp) | DSIM_MAIN_HBP(hbp);
                samsung_dsim_write(dsi, DSIM_MHPORCH_REG, reg);
 
                reg = DSIM_MAIN_VSA(m->vsync_end - m->vsync_start)
-                       | DSIM_MAIN_HSA(m->hsync_end - m->hsync_start);
+                       | DSIM_MAIN_HSA(hsa);
                samsung_dsim_write(dsi, DSIM_MSYNC_REG, reg);
        }
        reg =  DSIM_MAIN_HRESOL(m->hdisplay, num_bits_resol) |