drm/amd/pm: enable runpm support over BACO for SMU13.0.7

Enable SMU13.0.7 runpm support.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
index c4102cfb734c24802824be9300e768a2f4382e3f..d74debc584f89abec9bba396e8988d7d8b0573c0 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
@@ -122,6 +122,7 @@ static struct cmn2asic_msg_mapping smu_v13_0_7_message_map[SMU_MSG_MAX_COUNT] =
        MSG_MAP(PrepareMp1ForUnload,            PPSMC_MSG_PrepareMp1ForUnload,         0),
        MSG_MAP(SetMGpuFanBoostLimitRpm,        PPSMC_MSG_SetMGpuFanBoostLimitRpm,     0),
        MSG_MAP(DFCstateControl,                PPSMC_MSG_SetExternalClientDfCstateAllow, 0),
+       MSG_MAP(ArmD3,                          PPSMC_MSG_ArmD3,                       0),
 };
 
 static struct cmn2asic_mapping smu_v13_0_7_clk_map[SMU_CLK_COUNT] = {
@@ -1578,6 +1579,31 @@ static int smu_v13_0_7_set_mp1_state(struct smu_context *smu,
        return ret;
 }
 
+static int smu_v13_0_7_baco_enter(struct smu_context *smu)
+{
+       struct smu_baco_context *smu_baco = &smu->smu_baco;
+       struct amdgpu_device *adev = smu->adev;
+
+       if (adev->in_runpm && smu_cmn_is_audio_func_enabled(adev))
+               return smu_v13_0_baco_set_armd3_sequence(smu,
+                               smu_baco->maco_support ? BACO_SEQ_BAMACO : BACO_SEQ_BACO);
+       else
+               return smu_v13_0_baco_enter(smu);
+}
+
+static int smu_v13_0_7_baco_exit(struct smu_context *smu)
+{
+       struct amdgpu_device *adev = smu->adev;
+
+       if (adev->in_runpm && smu_cmn_is_audio_func_enabled(adev)) {
+               /* Wait for PMFW handling for the Dstate change */
+               usleep_range(10000, 11000);
+               return smu_v13_0_baco_set_armd3_sequence(smu, BACO_SEQ_ULPS);
+       } else {
+               return smu_v13_0_baco_exit(smu);
+       }
+}
+
 static bool smu_v13_0_7_is_mode1_reset_supported(struct smu_context *smu)
 {
        struct amdgpu_device *adev = smu->adev;
@@ -1655,8 +1681,8 @@ static const struct pptable_funcs smu_v13_0_7_ppt_funcs = {
        .baco_is_support = smu_v13_0_baco_is_support,
        .baco_get_state = smu_v13_0_baco_get_state,
        .baco_set_state = smu_v13_0_baco_set_state,
-       .baco_enter = smu_v13_0_baco_enter,
-       .baco_exit = smu_v13_0_baco_exit,
+       .baco_enter = smu_v13_0_7_baco_enter,
+       .baco_exit = smu_v13_0_7_baco_exit,
        .mode1_reset_is_support = smu_v13_0_7_is_mode1_reset_supported,
        .mode1_reset = smu_v13_0_mode1_reset,
        .set_mp1_state = smu_v13_0_7_set_mp1_state,