};
                };
 
+               ocmcram1: ocmcram@40300000 {
+                       compatible = "mmio-sram";
+                       reg = <0x40300000 0x80000>;
+                       ranges = <0x0 0x40300000 0x80000>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+               };
+
+               /*
+                * NOTE: ocmcram2 and ocmcram3 are not available on all
+                * DRA7xx and AM57xx variants. Confirm availability in
+                * the data manual for the exact part number in use
+                * before enabling these nodes in the board dts file.
+                */
+               ocmcram2: ocmcram@40400000 {
+                       status = "disabled";
+                       compatible = "mmio-sram";
+                       reg = <0x40400000 0x100000>;
+                       ranges = <0x0 0x40400000 0x100000>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+               };
+
+               ocmcram3: ocmcram@40500000 {
+                       status = "disabled";
+                       compatible = "mmio-sram";
+                       reg = <0x40500000 0x100000>;
+                       ranges = <0x0 0x40500000 0x100000>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+               };
+
                bandgap: bandgap@4a0021e0 {
                        reg = <0x4a0021e0 0xc
                                0x4a00232c 0xc