drm/i915: Correct ss -> steering calculation for pre-Xe_HP platforms

Accidental use of a "SLICE" macro where a "SUBSLICE" macro was intended
causes the group ID for steering to be calculated incorrectly on
pre-Xe_HP platforms.

Fixes: 9a92732f040a ("drm/i915/gt: Add general DSS steering iterator to intel_gt_mcr")
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220712220513.3451794-1-matthew.d.roper@intel.com

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_mcr.c b/drivers/gpu/drm/i915/gt/intel_gt_mcr.c
index f8c64ab9d3ca7d2597ea1ce6f1a40f3448814327..e79405a45312284adb2dd9fb6a9a8bff908ac93f 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_gt_mcr.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_mcr.c
@@ -515,7 +515,7 @@ void intel_gt_mcr_get_ss_steering(struct intel_gt *gt, unsigned int dss,
                *group = dss / GEN_DSS_PER_GSLICE;
                *instance = dss % GEN_DSS_PER_GSLICE;
        } else {
-               *group = dss / GEN_MAX_HSW_SLICES;
+               *group = dss / GEN_MAX_SS_PER_HSW_SLICE;
                *instance = dss % GEN_MAX_SS_PER_HSW_SLICE;
                return;
        }