The code has been updated to follow what datasheet says about
the polarity of the reset pin, which is active-low. Update
the device tree bindings accordingly.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/20250305105656.2133487-5-andriy.shevchenko@linux.intel.com
Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
reg = <0>;
spi-max-frequency = <3000000>;
spi-cpol;
- reset-gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;
+ reset-gpio = <&gpio1 1 GPIO_ACTIVE_LOW>;
irq-gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
extclock-enable;
extclock-freq = 16000000;