info->ts_ll_read = ((number & ICE_TS_LL_TX_TS_READ_M) != 0);
        info->ts_ll_int_read = ((number & ICE_TS_LL_TX_TS_INT_READ_M) != 0);
+       info->ll_phy_tmr_update = ((number & ICE_TS_LL_PHY_TMR_UPDATE_M) != 0);
 
        info->ena_ports = logical_id;
        info->tmr_own_map = phys_id;
                  info->ts_ll_read);
        ice_debug(hw, ICE_DBG_INIT, "dev caps: ts_ll_int_read = %u\n",
                  info->ts_ll_int_read);
+       ice_debug(hw, ICE_DBG_INIT, "dev caps: ll_phy_tmr_update = %u\n",
+                 info->ll_phy_tmr_update);
        ice_debug(hw, ICE_DBG_INIT, "dev caps: ieee_1588 ena_ports = %u\n",
                  info->ena_ports);
        ice_debug(hw, ICE_DBG_INIT, "dev caps: tmr_own_map = %u\n",
 
 #define ICE_TS_TMR1_ENA_M              BIT(26)
 #define ICE_TS_LL_TX_TS_READ_M         BIT(28)
 #define ICE_TS_LL_TX_TS_INT_READ_M     BIT(29)
+#define ICE_TS_LL_PHY_TMR_UPDATE_M     BIT(30)
 
 struct ice_ts_dev_info {
        /* Device specific info */
        u8 tmr1_ena;
        u8 ts_ll_read;
        u8 ts_ll_int_read;
+       u8 ll_phy_tmr_update;
 };
 
 #define ICE_NAC_TOPO_PRIMARY_M BIT(0)