arm64: dts: apple: s8001: Add CPU caches

Add information about CPU caches in Apple A9X SoC.

Signed-off-by: Nick Chan <towinchenmi@gmail.com>
Link: https://lore.kernel.org/r/20250220-caches-v1-5-2c7011097768@gmail.com
Signed-off-by: Sven Peter <sven@svenpeter.dev>

diff --git a/arch/arm64/boot/dts/apple/s8001.dtsi b/arch/arm64/boot/dts/apple/s8001.dtsi
index d56d49c048bbf55e5f2edf40f6fd1fcff6342a9f..fee3507658948a9b4db6a185665fdff9f5acc446 100644 (file)
--- a/arch/arm64/boot/dts/apple/s8001.dtsi
+++ b/arch/arm64/boot/dts/apple/s8001.dtsi
@@ -36,6 +36,9 @@
                        performance-domains = <&cpufreq>;
                        enable-method = "spin-table";
                        device_type = "cpu";
+                       next-level-cache = <&l2_cache>;
+                       i-cache-size = <0x10000>;
+                       d-cache-size = <0x10000>;
                };
 
                cpu1: cpu@1 {
@@ -46,6 +49,16 @@
                        performance-domains = <&cpufreq>;
                        enable-method = "spin-table";
                        device_type = "cpu";
+                       next-level-cache = <&l2_cache>;
+                       i-cache-size = <0x10000>;
+                       d-cache-size = <0x10000>;
+               };
+
+               l2_cache: l2-cache {
+                       compatible = "cache";
+                       cache-level = <2>;
+                       cache-unified;
+                       cache-size = <0x300000>;
                };
        };