ARM: dts: qcom: msm8226: Add pinctrl for sdhci nodes

Also remove the pinctrl from qcom-apq8026-lg-lenok as it is the same
value as the generic pinctrl.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220216212433.1373903-4-luca@z3ntu.xyz

diff --git a/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts b/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts
index 1519544029e7fb6c1d008355f51ea8f206342b01..5ce42dd962c4b5be6b4c7412e59bd167ec256dc0 100644 (file)
--- a/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts
+++ b/arch/arm/boot/dts/qcom-apq8026-lg-lenok.dts
@@ -204,9 +204,6 @@
 
        bus-width = <8>;
        non-removable;
-
-       pinctrl-names = "default";
-       pinctrl-0 = <&sdhc1_pin_a>;
 };
 
 &smbb {
@@ -219,20 +216,6 @@
 };
 
 &tlmm {
-       sdhc1_pin_a: sdhc1-pin-active {
-               clk {
-                       pins = "sdc1_clk";
-                       drive-strength = <10>;
-                       bias-disable;
-               };
-
-               cmd-data {
-                       pins = "sdc1_cmd", "sdc1_data";
-                       drive-strength = <10>;
-                       bias-pull-up;
-               };
-       };
-
        touch_pins: touch {
                irq {
                        pins = "gpio17";

diff --git a/arch/arm/boot/dts/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom-msm8226.dtsi
index 103c0ab708141b62b58092328502e0a96e5048f1..dfeb47eb41a2612d469fc79a51dec718de2324a1 100644 (file)
--- a/arch/arm/boot/dts/qcom-msm8226.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8226.dtsi
@@ -116,6 +116,8 @@
                                 <&gcc GCC_SDCC1_AHB_CLK>,
                                 <&xo_board>;
                        clock-names = "core", "iface", "xo";
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&sdhc1_default_state>;
                        status = "disabled";
                };
 
@@ -130,6 +132,8 @@
                                 <&gcc GCC_SDCC2_AHB_CLK>,
                                 <&xo_board>;
                        clock-names = "core", "iface", "xo";
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&sdhc2_default_state>;
                        status = "disabled";
                };
 
@@ -144,6 +148,8 @@
                                 <&gcc GCC_SDCC3_AHB_CLK>,
                                 <&xo_board>;
                        clock-names = "core", "iface", "xo";
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&sdhc3_default_state>;
                        status = "disabled";
                };
 
@@ -320,6 +326,57 @@
                                drive-strength = <2>;
                                bias-disable;
                        };
+
+                       sdhc1_default_state: sdhc1-default-state {
+                               clk {
+                                       pins = "sdc1_clk";
+                                       drive-strength = <10>;
+                                       bias-disable;
+                               };
+
+                               cmd-data {
+                                       pins = "sdc1_cmd", "sdc1_data";
+                                       drive-strength = <10>;
+                                       bias-pull-up;
+                               };
+                       };
+
+                       sdhc2_default_state: sdhc2-default-state {
+                               clk {
+                                       pins = "sdc2_clk";
+                                       drive-strength = <10>;
+                                       bias-disable;
+                               };
+
+                               cmd-data {
+                                       pins = "sdc2_cmd", "sdc2_data";
+                                       drive-strength = <10>;
+                                       bias-pull-up;
+                               };
+                       };
+
+                       sdhc3_default_state: sdhc3-default-state {
+                               clk {
+                                       pins = "gpio44";
+                                       function = "sdc3";
+                                       drive-strength = <8>;
+                                       bias-disable;
+                               };
+
+                               cmd {
+                                       pins = "gpio43";
+                                       function = "sdc3";
+                                       drive-strength = <8>;
+                                       bias-pull-up;
+                               };
+
+                               data {
+                                       pins = "gpio39", "gpio40", "gpio41", "gpio42";
+                                       function = "sdc3";
+                                       drive-strength = <8>;
+                                       bias-pull-up;
+                               };
+                       };
                };
 
                restart@fc4ab000 {