drm/i915/dsi: fix MIPI_BKLT_EN_1 native GPIO index

Due to copy-paste fail, MIPI_BKLT_EN_1 would always use PPS index 1,
never 0. Fix the sloppiest commit in recent memory.

Fixes: f087cfe6fcff ("drm/i915/dsi: add support for ICL+ native MIPI GPIO sequence")
Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221220140105.313333-1-jani.nikula@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
index 41f025f089d9f643afa1754c41131321267af6df..2cbc1292ab3821f557e09ed349091c3685a87804 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
+++ b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
@@ -430,7 +430,7 @@ static void icl_native_gpio_set_value(struct drm_i915_private *dev_priv,
                break;
        case MIPI_BKLT_EN_1:
        case MIPI_BKLT_EN_2:
-               index = gpio == MIPI_AVDD_EN_1 ? 0 : 1;
+               index = gpio == MIPI_BKLT_EN_1 ? 0 : 1;
 
                intel_de_rmw(dev_priv, PP_CONTROL(index), EDP_BLC_ENABLE,
                             value ? EDP_BLC_ENABLE : 0);