clk: renesas: r7s9210: Add SPI clocks

Add RSPI clocks for RZ/A2.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/clk/renesas/r7s9210-cpg-mssr.c b/drivers/clk/renesas/r7s9210-cpg-mssr.c
index d8ff4cb0defc282b75aeddc29152aab084509690..5135f13ec62887ddc5806af4348cc4a7e4cdd7a1 100644 (file)
--- a/drivers/clk/renesas/r7s9210-cpg-mssr.c
+++ b/drivers/clk/renesas/r7s9210-cpg-mssr.c
@@ -95,6 +95,9 @@ static const struct mssr_mod_clk r7s9210_mod_clks[] __initconst = {
        DEF_MOD_STB("i2c1",      86,    R7S9210_CLK_P1),
        DEF_MOD_STB("i2c0",      87,    R7S9210_CLK_P1),
 
+       DEF_MOD_STB("spi2",      95,    R7S9210_CLK_P1),
+       DEF_MOD_STB("spi1",      96,    R7S9210_CLK_P1),
+       DEF_MOD_STB("spi0",      97,    R7S9210_CLK_P1),
 };
 
 /* The clock dividers in the table vary based on DT and register settings */