arm64: dts: renesas: r9a08g045: Add I2C nodes

The Renesas RZ/G3S SoC has 4 I2C channels. Add DT nodes for them.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240820101918.2384635-10-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi
index e062f5eed63879402d255606befaa92ffd7779e8..067a26a66c24ca1f0d56e9b4808b888f2bc6b6f7 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi
@@ -72,6 +72,94 @@
                        status = "disabled";
                };
 
+               i2c0: i2c@10090000 {
+                       compatible = "renesas,riic-r9a08g045", "renesas,riic-r9a09g057";
+                       reg = <0 0x10090000 0 0x400>;
+                       interrupts = <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 263 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 264 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "tei", "ri", "ti", "spi", "sti",
+                                         "naki", "ali", "tmoi";
+                       clocks = <&cpg CPG_MOD R9A08G045_I2C0_PCLK>;
+                       clock-frequency = <100000>;
+                       resets = <&cpg R9A08G045_I2C0_MRST>;
+                       power-domains = <&cpg>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
+               i2c1: i2c@10090400 {
+                       compatible = "renesas,riic-r9a08g045", "renesas,riic-r9a09g057";
+                       reg = <0 0x10090400 0 0x400>;
+                       interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 271 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 272 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "tei", "ri", "ti", "spi", "sti",
+                                         "naki", "ali", "tmoi";
+                       clocks = <&cpg CPG_MOD R9A08G045_I2C1_PCLK>;
+                       clock-frequency = <100000>;
+                       resets = <&cpg R9A08G045_I2C1_MRST>;
+                       power-domains = <&cpg>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
+               i2c2: i2c@10090800 {
+                       compatible = "renesas,riic-r9a08g045", "renesas,riic-r9a09g057";
+                       reg = <0 0x10090800 0 0x400>;
+                       interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 279 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "tei", "ri", "ti", "spi", "sti",
+                                         "naki", "ali", "tmoi";
+                       clocks = <&cpg CPG_MOD R9A08G045_I2C2_PCLK>;
+                       clock-frequency = <100000>;
+                       resets = <&cpg R9A08G045_I2C2_MRST>;
+                       power-domains = <&cpg>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
+               i2c3: i2c@10090c00 {
+                       compatible = "renesas,riic-r9a08g045", "renesas,riic-r9a09g057";
+                       reg = <0 0x10090c00 0 0x400>;
+                       interrupts = <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 287 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 288 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "tei", "ri", "ti", "spi", "sti",
+                                         "naki", "ali", "tmoi";
+                       clocks = <&cpg CPG_MOD R9A08G045_I2C3_PCLK>;
+                       clock-frequency = <100000>;
+                       resets = <&cpg R9A08G045_I2C3_MRST>;
+                       power-domains = <&cpg>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
                cpg: clock-controller@11010000 {
                        compatible = "renesas,r9a08g045-cpg";
                        reg = <0 0x11010000 0 0x10000>;