psp->prep_cmd_buf = psp_v10_0_prep_cmd_buf;
                psp->ring_init = psp_v10_0_ring_init;
                psp->ring_create = psp_v10_0_ring_create;
+               psp->ring_destroy = psp_v10_0_ring_destroy;
                psp->cmd_submit = psp_v10_0_cmd_submit;
                psp->compare_sram_data = psp_v10_0_compare_sram_data;
                break;
 
        return ret;
 }
 
+int psp_v10_0_ring_destroy(struct psp_context *psp, enum psp_ring_type ring_type)
+{
+       int ret = 0;
+       struct psp_ring *ring;
+       unsigned int psp_ring_reg = 0;
+       struct amdgpu_device *adev = psp->adev;
+
+       ring = &psp->km_ring;
+
+       /* Write the ring destroy command to C2PMSG_64 */
+       psp_ring_reg = 3 << 16;
+       WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg);
+
+       /* There might be handshake issue with hardware which needs delay */
+       mdelay(20);
+
+       /* Wait for response flag (bit 31) in C2PMSG_64 */
+       ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64),
+                          0x80000000, 0x80000000, false);
+
+       amdgpu_bo_free_kernel(&adev->firmware.rbuf,
+                             &ring->ring_mem_mc_addr,
+                             (void **)&ring->ring_mem);
+
+       return ret;
+}
+
 int psp_v10_0_cmd_submit(struct psp_context *psp,
                        struct amdgpu_firmware_info *ucode,
                        uint64_t cmd_buf_mc_addr, uint64_t fence_mc_addr,
 
                              enum psp_ring_type ring_type);
 extern int psp_v10_0_ring_create(struct psp_context *psp,
                                 enum psp_ring_type ring_type);
+extern int psp_v10_0_ring_destroy(struct psp_context *psp,
+                                 enum psp_ring_type ring_type);
 extern int psp_v10_0_cmd_submit(struct psp_context *psp,
                               struct amdgpu_firmware_info *ucode,
                               uint64_t cmd_buf_mc_addr, uint64_t fence_mc_addr,