]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
bnxt_en: Fix firmware message delay loop regression.
authorMichael Chan <michael.chan@broadcom.com>
Tue, 8 May 2018 07:18:38 +0000 (03:18 -0400)
committerBrian Maly <brian.maly@oracle.com>
Wed, 27 Feb 2019 19:46:57 +0000 (14:46 -0500)
Orabug: 29357977

A recent change to reduce delay granularity waiting for firmware
reponse has caused a regression.  With a tighter delay loop,
the driver may see the beginning part of the response faster.
The original 5 usec delay to wait for the rest of the message
is not long enough and some messages are detected as invalid.

Increase the maximum wait time from 5 usec to 20 usec.  Also, fix
the debug message that shows the total delay time for the response
when the message times out.  With the new logic, the delay time
is not fixed per iteration of the loop, so we define a macro to
show the total delay time.

Fixes: 9751e8e71487 ("bnxt_en: reduce timeout on initial HWRM calls")
Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from commit cc559c1ac250a6025bd4a9528e424b8da250655b)
Signed-off-by: Brian Maly <brian.maly@oracle.com>
Conflicts:
drivers/net/ethernet/broadcom/bnxt/bnxt.c

drivers/net/ethernet/broadcom/bnxt/bnxt.c
drivers/net/ethernet/broadcom/bnxt/bnxt.h

index b92003e5b33604b09812c25559ed484f7cbf0b9a..bb4ac7339a8228d9b3343ff8aa19f8dcdd5cd8d9 100644 (file)
@@ -3443,6 +3443,8 @@ static int bnxt_hwrm_do_send_msg(struct bnxt *bp, void *msg, u32 msg_len,
                        return -1;
                }
        } else {
+               int j;
+
                /* Check if response len is updated */
                resp_len = bp->hwrm_cmd_resp_addr + HWRM_RESP_LEN_OFFSET;
                for (i = 0; i < tmo_count; i++) {
@@ -3461,22 +3463,24 @@ static int bnxt_hwrm_do_send_msg(struct bnxt *bp, void *msg, u32 msg_len,
 
                if (i >= tmo_count) {
                        netdev_err(bp->dev, "Error (timeout: %d) msg {0x%x 0x%x} len:%d\n",
-                                  timeout, le16_to_cpu(req->req_type),
+                                  HWRM_TOTAL_TIMEOUT(i),
+                                  le16_to_cpu(req->req_type),
                                   le16_to_cpu(req->seq_id), len);
                        return -1;
                }
 
                /* Last word of resp contains valid bit */
                valid = bp->hwrm_cmd_resp_addr + len - 4;
-               for (i = 0; i < 5; i++) {
+               for (j = 0; j < HWRM_VALID_BIT_DELAY_USEC; j++) {
                        if (le32_to_cpu(*valid) & HWRM_RESP_VALID_MASK)
                                break;
                        udelay(1);
                }
 
-               if (i >= 5) {
+               if (j >= HWRM_VALID_BIT_DELAY_USEC) {
                        netdev_err(bp->dev, "Error (timeout: %d) msg {0x%x 0x%x} len:%d v:%d\n",
-                                  timeout, le16_to_cpu(req->req_type),
+                                  HWRM_TOTAL_TIMEOUT(i),
+                                  le16_to_cpu(req->req_type),
                                   le16_to_cpu(req->seq_id), len, *valid);
                        return -1;
                }
index 17d01af44ab1e8fd614d3d6807d3e0ac889b795f..09a70ea409ae371583b6699d672f2335b3655b60 100644 (file)
@@ -522,6 +522,13 @@ struct rx_tpa_end_cmp_ext {
 #define HWRM_MIN_TIMEOUT               25
 #define HWRM_MAX_TIMEOUT               40
 
+#define HWRM_TOTAL_TIMEOUT(n)  (((n) <= HWRM_SHORT_TIMEOUT_COUNTER) ?  \
+       ((n) * HWRM_SHORT_MIN_TIMEOUT) :                                \
+       (HWRM_SHORT_TIMEOUT_COUNTER * HWRM_SHORT_MIN_TIMEOUT +          \
+        ((n) - HWRM_SHORT_TIMEOUT_COUNTER) * HWRM_MIN_TIMEOUT))
+
+#define HWRM_VALID_BIT_DELAY_USEC      20
+
 #define BNXT_RX_EVENT  1
 #define BNXT_AGG_EVENT 2
 #define BNXT_TX_EVENT  4