scsi: ufs: host: mediatek: Handle broken RTC based on DTS setting

Introduce a mechanism to handle broken RTC by checking the DTS
setting. The configuration is specifically required for legacy platform.

Signed-off-by: Peter Wang <peter.wang@mediatek.com>
Link: https://lore.kernel.org/r/20250722030841.1998783-5-peter.wang@mediatek.com
Reviewed-by: Chun-Hung Wu <chun-hung.wu@mediatek.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index b30203d83ef102b60aa7d3046c68efd4c1b9deb9..112056e5d8e0213221d8f879f91e61c65b64e3aa 100644 (file)
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -679,6 +679,9 @@ static void ufs_mtk_init_host_caps(struct ufs_hba *hba)
        if (of_property_read_bool(np, "mediatek,ufs-rtff-mtcmos"))
                host->caps |= UFS_MTK_CAP_RTFF_MTCMOS;
 
+       if (of_property_read_bool(np, "mediatek,ufs-broken-rtc"))
+               host->caps |= UFS_MTK_CAP_MCQ_BROKEN_RTC;
+
        dev_info(hba->dev, "caps: 0x%x", host->caps);
 }
 
@@ -1035,8 +1038,11 @@ static int ufs_mtk_init(struct ufs_hba *hba)
        shost->rpm_autosuspend_delay = MTK_RPM_AUTOSUSPEND_DELAY_MS;
 
        hba->quirks |= UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL;
+
        hba->quirks |= UFSHCD_QUIRK_MCQ_BROKEN_INTR;
-       hba->quirks |= UFSHCD_QUIRK_MCQ_BROKEN_RTC;
+       if (host->caps & UFS_MTK_CAP_MCQ_BROKEN_RTC)
+               hba->quirks |= UFSHCD_QUIRK_MCQ_BROKEN_RTC;
+
        hba->vps->wb_flush_threshold = UFS_WB_BUF_REMAIN_PERCENT(80);
 
        if (host->caps & UFS_MTK_CAP_DISABLE_AH8)

diff --git a/drivers/ufs/host/ufs-mediatek.h b/drivers/ufs/host/ufs-mediatek.h
index 1082f761bb44fc89f2d4cc4b3e47beb779478ff3..abb4a4fd44029b58ad12ef3f9baaa21d31786563 100644 (file)
--- a/drivers/ufs/host/ufs-mediatek.h
+++ b/drivers/ufs/host/ufs-mediatek.h
@@ -133,6 +133,8 @@ enum ufs_mtk_host_caps {
        UFS_MTK_CAP_DISABLE_MCQ                = 1 << 8,
        /* Control MTCMOS with RTFF */
        UFS_MTK_CAP_RTFF_MTCMOS                = 1 << 9,
+
+       UFS_MTK_CAP_MCQ_BROKEN_RTC             = 1 << 10,
 };
 
 struct ufs_mtk_crypt_cfg {