if (!AR_SREV_9271(ah))
                        val &= ~AR_PCU_MISC_MODE2_HWWAR1;
 
-               if (AR_SREV_9287_10_OR_LATER(ah))
+               if (AR_SREV_9287_11_OR_LATER(ah))
                        val = val & (~AR_PCU_MISC_MODE2_HWWAR2);
 
                REG_WRITE(ah, AR_PCU_MISC_MODE2, val);
        REGWRITE_BUFFER_FLUSH(ah);
        DISABLE_REGWRITE_BUFFER(ah);
 
-       if (AR_SREV_9280(ah) || AR_SREV_9287_10_OR_LATER(ah))
+       if (AR_SREV_9280(ah) || AR_SREV_9287_11_OR_LATER(ah))
                REG_WRITE_ARRAY(&ah->iniModesRxGain, modesIndex, regWrites);
 
        if (AR_SREV_9280(ah) || AR_SREV_9285_12_OR_LATER(ah) ||
-           AR_SREV_9287_10_OR_LATER(ah))
+           AR_SREV_9287_11_OR_LATER(ah))
                REG_WRITE_ARRAY(&ah->iniModesTxGain, modesIndex, regWrites);
 
        if (AR_SREV_9271_10(ah))
 
                        return false;
        } else {
                if (AR_SREV_9280_20_OR_LATER(ah)) {
-                       if (!AR_SREV_9287_10_OR_LATER(ah))
+                       if (!AR_SREV_9287_11_OR_LATER(ah))
                                REG_CLR_BIT(ah, AR_PHY_ADC_CTL,
                                            AR_PHY_ADC_CTL_OFF_PWDADC);
                        REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,
                }
 
                if (AR_SREV_9280_20_OR_LATER(ah)) {
-                       if (!AR_SREV_9287_10_OR_LATER(ah))
+                       if (!AR_SREV_9287_11_OR_LATER(ah))
                                REG_SET_BIT(ah, AR_PHY_ADC_CTL,
                                            AR_PHY_ADC_CTL_OFF_PWDADC);
                        REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,
 
 #define AR5416_VER_MASK (eep->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK)
 #define OLC_FOR_AR9280_20_LATER (AR_SREV_9280_20_OR_LATER(ah) && \
                                 ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL))
-#define OLC_FOR_AR9287_10_LATER (AR_SREV_9287_10_OR_LATER(ah) && \
+#define OLC_FOR_AR9287_10_LATER (AR_SREV_9287_11_OR_LATER(ah) && \
                                 ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL))
 
 #define AR_EEPROM_RFSILENT_GPIO_SEL     0x001c
 
        if (AR_SREV_9300_20_OR_LATER(ah))
                pCap->hw_caps |= ATH9K_HW_CAP_RAC_SUPPORTED;
 
-       if (AR_SREV_9287_10_OR_LATER(ah) || AR_SREV_9271(ah))
+       if (AR_SREV_9287_11_OR_LATER(ah) || AR_SREV_9271(ah))
                pCap->hw_caps |= ATH9K_HW_CAP_SGI_20;
 
        if (AR_SREV_9285(ah))
                return MS_REG_READ(AR9300, gpio) != 0;
        else if (AR_SREV_9271(ah))
                return MS_REG_READ(AR9271, gpio) != 0;
-       else if (AR_SREV_9287_10_OR_LATER(ah))
+       else if (AR_SREV_9287_11_OR_LATER(ah))
                return MS_REG_READ(AR9287, gpio) != 0;
        else if (AR_SREV_9285_12_OR_LATER(ah))
                return MS_REG_READ(AR9285, gpio) != 0;
 
 
 #define AR_SREV_9287(_ah) \
        (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9287))
-#define AR_SREV_9287_10_OR_LATER(_ah) \
+#define AR_SREV_9287_11_OR_LATER(_ah) \
        (((_ah)->hw_version.macVersion >= AR_SREV_VERSION_9287))
-#define AR_SREV_9287_10(_ah) \
-       (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9287) && \
-        ((_ah)->hw_version.macRev == AR_SREV_REVISION_9287_10))
 #define AR_SREV_9287_11(_ah) \
        (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9287) && \
         ((_ah)->hw_version.macRev == AR_SREV_REVISION_9287_11))
-#define AR_SREV_9287_11_OR_LATER(_ah) \
-       (((_ah)->hw_version.macVersion > AR_SREV_VERSION_9287) || \
-        (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9287) && \
-         ((_ah)->hw_version.macRev >= AR_SREV_REVISION_9287_11)))
 #define AR_SREV_9287_12(_ah) \
        (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9287) && \
         ((_ah)->hw_version.macRev == AR_SREV_REVISION_9287_12))