]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
arm64: dts: imx8mp: Update Fast ethernet PHY MDIO addresses to match DH i.MX8MP DHCOM...
authorMarek Vasut <marex@denx.de>
Thu, 27 Jun 2024 23:30:09 +0000 (01:30 +0200)
committerShawn Guo <shawnguo@kernel.org>
Mon, 1 Jul 2024 14:21:46 +0000 (22:21 +0800)
The production DH i.MX8MP DHCOM SoM rev.200 uses updated PHY MDIO addresses
for the Fast ethernet PHYs. Update the base SoM DT to cater for this change.
Prototype rev.100 SoM was never publicly available and was manufactured in
limited series, anything currently available is rev.200 or newer, so it is
safe to update the DT this way.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi

index a1b77d57a90616d0317a58477e498e6c077a3f7f..a90e28c07e3f1d5b3b29d9288528e98a868e1b3f 100644 (file)
                #size-cells = <0>;
 
                /* Up to one of these two PHYs may be populated. */
-               ethphy0f: ethernet-phy@0 { /* SMSC LAN8740Ai */
+               ethphy0f: ethernet-phy@1 { /* SMSC LAN8740Ai */
                        compatible = "ethernet-phy-id0007.c110",
                                     "ethernet-phy-ieee802.3-c22";
                        interrupt-parent = <&gpio3>;
                        interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
                        pinctrl-0 = <&pinctrl_ethphy0>;
                        pinctrl-names = "default";
-                       reg = <0>;
+                       reg = <1>;
                        reset-assert-us = <1000>;
                        reset-deassert-us = <1000>;
                        reset-gpios = <&ioexp 4 GPIO_ACTIVE_LOW>;
                #size-cells = <0>;
 
                /* Up to one PHY may be populated. */
-               ethphy1f: ethernet-phy@1 { /* SMSC LAN8740Ai */
+               ethphy1f: ethernet-phy@2 { /* SMSC LAN8740Ai */
                        compatible = "ethernet-phy-id0007.c110",
                                     "ethernet-phy-ieee802.3-c22";
                        interrupt-parent = <&gpio4>;
                        interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
                        pinctrl-0 = <&pinctrl_ethphy1>;
                        pinctrl-names = "default";
-                       reg = <1>;
+                       reg = <2>;
                        reset-assert-us = <1000>;
                        reset-deassert-us = <1000>;
                        reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;