* if TVE is active on each TCON TV. If it is, mux should be switched
         * to TVE clock parent.
         */
+       i = 0;
        clk_data->hws[CLK_TCON_TOP_TV0] =
                sun8i_tcon_top_register_gate(dev, "tcon-tv0", regs,
                                             &tcon_top->reg_lock,
-                                            TCON_TOP_TCON_TV0_GATE, 0);
+                                            TCON_TOP_TCON_TV0_GATE, i++);
 
        if (quirks->has_tcon_tv1)
                clk_data->hws[CLK_TCON_TOP_TV1] =
                        sun8i_tcon_top_register_gate(dev, "tcon-tv1", regs,
                                                     &tcon_top->reg_lock,
-                                                    TCON_TOP_TCON_TV1_GATE, 1);
+                                                    TCON_TOP_TCON_TV1_GATE, i++);
 
        if (quirks->has_dsi)
                clk_data->hws[CLK_TCON_TOP_DSI] =
                        sun8i_tcon_top_register_gate(dev, "dsi", regs,
                                                     &tcon_top->reg_lock,
-                                                    TCON_TOP_TCON_DSI_GATE, 2);
+                                                    TCON_TOP_TCON_DSI_GATE, i++);
 
        for (i = 0; i < CLK_NUM; i++)
                if (IS_ERR(clk_data->hws[i])) {
        .has_dsi        = true,
 };
 
+static const struct sun8i_tcon_top_quirks sun20i_d1_tcon_top_quirks = {
+       .has_dsi        = true,
+};
+
 static const struct sun8i_tcon_top_quirks sun50i_h6_tcon_top_quirks = {
        /* Nothing special */
 };
                .compatible = "allwinner,sun8i-r40-tcon-top",
                .data = &sun8i_r40_tcon_top_quirks
        },
+       {
+               .compatible = "allwinner,sun20i-d1-tcon-top",
+               .data = &sun20i_d1_tcon_top_quirks
+       },
        {
                .compatible = "allwinner,sun50i-h6-tcon-top",
                .data = &sun50i_h6_tcon_top_quirks