]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
usb: host: xhci-plat: Add support for XHCI_WRITE_64_HI_LO
authorDaehwan Jung <dh10.jung@samsung.com>
Mon, 10 Jun 2024 11:39:13 +0000 (20:39 +0900)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 20 Jun 2024 17:30:30 +0000 (19:30 +0200)
xHCI specification 5.1 "Register Conventions" states that 64 bit
registers should be written in low-high order. All writing operations
in xhci is done low-high order following the spec.

Add a new quirk to support workaround for high-low order.

Signed-off-by: Daehwan Jung <dh10.jung@samsung.com>
Link: https://lore.kernel.org/r/1718019553-111939-4-git-send-email-dh10.jung@samsung.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/usb/host/xhci-plat.c

index 3d071b8753088a5437c2e9f82031a6db4ad91208..31bdfa52eeb252172325f226d53fff58d242d2d8 100644 (file)
@@ -256,6 +256,9 @@ int xhci_plat_probe(struct platform_device *pdev, struct device *sysdev, const s
                if (device_property_read_bool(tmpdev, "xhci-sg-trb-cache-size-quirk"))
                        xhci->quirks |= XHCI_SG_TRB_CACHE_SIZE_QUIRK;
 
+               if (device_property_read_bool(tmpdev, "write-64-hi-lo-quirk"))
+                       xhci->quirks |= XHCI_WRITE_64_HI_LO;
+
                device_property_read_u32(tmpdev, "imod-interval-ns",
                                         &xhci->imod_interval);
        }