clk: qcom: rcg: add 1/1 pixel clock ratio

LVDS clocks require 1:1 ration support in the table used by
clk_rcg_pixel_ops. Add corresponding divider to the table.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20241224-apq8064-fix-mmcc-v1-3-c95d2e2bf143@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/drivers/clk/qcom/clk-rcg.c b/drivers/clk/qcom/clk-rcg.c
index 88845baa7f84234b8554ef59cbfe2322870f1f69..987141c91fe0bc323d84529afbf6c96d247a55a3 100644 (file)
--- a/drivers/clk/qcom/clk-rcg.c
+++ b/drivers/clk/qcom/clk-rcg.c
@@ -597,6 +597,7 @@ struct frac_entry {
 };
 
 static const struct frac_entry pixel_table[] = {
+       { 1, 1 },
        { 1, 2 },
        { 1, 3 },
        { 3, 16 },