static int omap_aes_hw_init(struct omap_aes_dev *dd)
 {
-       /*
-        * clocks are enabled when request starts and disabled when finished.
-        * It may be long delays between requests.
-        * Device might go to off mode to save power.
-        */
-       pm_runtime_get_sync(dd->dev);
-
        if (!(dd->flags & FLAGS_INIT)) {
                dd->flags |= FLAGS_INIT;
                dd->err = 0;
 
        pr_debug("err: %d\n", err);
 
-       pm_runtime_put(dd->dev);
        dd->flags &= ~FLAGS_BUSY;
 
        req->base.complete(&req->base, err);
 
 static int omap_aes_cra_init(struct crypto_tfm *tfm)
 {
-       pr_debug("enter\n");
+       struct omap_aes_dev *dd = NULL;
+
+       /* Find AES device, currently picks the first device */
+       spin_lock_bh(&list_lock);
+       list_for_each_entry(dd, &dev_list, list) {
+               break;
+       }
+       spin_unlock_bh(&list_lock);
 
+       pm_runtime_get_sync(dd->dev);
        tfm->crt_ablkcipher.reqsize = sizeof(struct omap_aes_reqctx);
 
        return 0;
 
 static void omap_aes_cra_exit(struct crypto_tfm *tfm)
 {
-       pr_debug("enter\n");
+       struct omap_aes_dev *dd = NULL;
+
+       /* Find AES device, currently picks the first device */
+       spin_lock_bh(&list_lock);
+       list_for_each_entry(dd, &dev_list, list) {
+               break;
+       }
+       spin_unlock_bh(&list_lock);
+
+       pm_runtime_put_sync(dd->dev);
 }
 
 /* ********************** ALGS ************************************ */