]> www.infradead.org Git - users/hch/misc.git/commitdiff
drm/amd/display: Revert "Increase halt timeout for DMCUB to 1s"
authorNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Wed, 19 Feb 2025 14:46:55 +0000 (09:46 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 5 Mar 2025 15:39:38 +0000 (10:39 -0500)
This reverts commit 50f040c53ea9 ("drm/amd/display: Increase halt
timeout for DMCUB to 1s")

There's two issues here:
1. Each poll is closer to 10us than 1us so it stalls for 15s on PNP.
2. We're reading the wrong scratch register to check for the HALT code.

Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Wayne Lin <wayne.lin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn35.c

index 1fac75dfc650c9a218b6d0466ad2ce18a53d5b4b..3d0bba602b53a7e308b9d3bfc26628ce200b232a 100644 (file)
@@ -83,8 +83,8 @@ static inline void dmub_dcn31_translate_addr(const union dmub_addr *addr_in,
 void dmub_dcn31_reset(struct dmub_srv *dmub)
 {
        union dmub_gpint_data_register cmd;
-       const uint32_t timeout = 1000000;
-       uint32_t in_reset, is_enabled, scratch, i, pwait_mode;
+       const uint32_t timeout = 100;
+       uint32_t in_reset, scratch, i, pwait_mode;
 
        REG_GET(DMCUB_CNTL2, DMCUB_SOFT_RESET, &in_reset);
 
@@ -125,14 +125,9 @@ void dmub_dcn31_reset(struct dmub_srv *dmub)
                /* Force reset in case we timed out, DMCUB is likely hung. */
        }
 
-       REG_GET(DMCUB_CNTL, DMCUB_ENABLE, &is_enabled);
-
-       if (is_enabled) {
-               REG_UPDATE(DMCUB_CNTL2, DMCUB_SOFT_RESET, 1);
-               REG_UPDATE(MMHUBBUB_SOFT_RESET, DMUIF_SOFT_RESET, 1);
-               REG_UPDATE(DMCUB_CNTL, DMCUB_ENABLE, 0);
-       }
-
+       REG_UPDATE(DMCUB_CNTL2, DMCUB_SOFT_RESET, 1);
+       REG_UPDATE(DMCUB_CNTL, DMCUB_ENABLE, 0);
+       REG_UPDATE(MMHUBBUB_SOFT_RESET, DMUIF_SOFT_RESET, 1);
        REG_WRITE(DMCUB_INBOX1_RPTR, 0);
        REG_WRITE(DMCUB_INBOX1_WPTR, 0);
        REG_WRITE(DMCUB_OUTBOX1_RPTR, 0);
index 652173b10401d32869469c6062c5a7a37d110e02..e5e77bd3c31ea1b569d9d8574c0f9f49ef44a731 100644 (file)
@@ -88,7 +88,7 @@ static inline void dmub_dcn35_translate_addr(const union dmub_addr *addr_in,
 void dmub_dcn35_reset(struct dmub_srv *dmub)
 {
        union dmub_gpint_data_register cmd;
-       const uint32_t timeout = 1000000;
+       const uint32_t timeout = 100;
        uint32_t in_reset, is_enabled, scratch, i, pwait_mode;
 
        REG_GET(DMCUB_CNTL2, DMCUB_SOFT_RESET, &in_reset);