struct vb2_v4l2_buffer *buf;
        int ret;
        dma_addr_t new_rd_ptr;
+       struct dec_output_info dec_info;
+       unsigned int i;
+
+       for (i = 0; i < v4l2_m2m_num_dst_bufs_ready(m2m_ctx); i++) {
+               ret = wave5_vpu_dec_set_disp_flag(inst, i);
+               if (ret)
+                       dev_dbg(inst->dev->dev,
+                               "%s: Setting display flag of buf index: %u, fail: %d\n",
+                               __func__, i, ret);
+       }
 
        while ((buf = v4l2_m2m_src_buf_remove(m2m_ctx))) {
                dev_dbg(inst->dev->dev, "%s: (Multiplanar) buf type %4u | index %4u\n",
                v4l2_m2m_buf_done(buf, VB2_BUF_STATE_ERROR);
        }
 
+       while (wave5_vpu_dec_get_output_info(inst, &dec_info) == 0) {
+               if (dec_info.index_frame_display >= 0)
+                       wave5_vpu_dec_set_disp_flag(inst, dec_info.index_frame_display);
+       }
+
        ret = wave5_vpu_flush_instance(inst);
        if (ret)
                return ret;
                        break;
 
                if (wave5_vpu_dec_get_output_info(inst, &dec_output_info))
-                       dev_dbg(inst->dev->dev, "Getting decoding results from fw, fail\n");
+                       dev_dbg(inst->dev->dev, "there is no output info\n");
        }
 
        v4l2_m2m_update_stop_streaming_state(m2m_ctx, q);
 
                                 inst->type == VPU_INST_TYPE_DEC ? "DECODER" : "ENCODER", inst->id);
                        mutex_unlock(&inst->dev->hw_lock);
                        return -ETIMEDOUT;
+               } else if (ret == -EBUSY) {
+                       struct dec_output_info dec_info;
+
+                       mutex_unlock(&inst->dev->hw_lock);
+                       wave5_vpu_dec_get_output_info(inst, &dec_info);
+                       ret = mutex_lock_interruptible(&inst->dev->hw_lock);
+                       if (ret)
+                               return ret;
+                       if (dec_info.index_frame_display > 0)
+                               wave5_vpu_dec_set_disp_flag(inst, dec_info.index_frame_display);
                }
        } while (ret != 0);
        mutex_unlock(&inst->dev->hw_lock);