static int cdv_get_brightness(struct backlight_device *bd)
 {
        struct drm_device *dev = bl_get_data(bd);
+       struct pci_dev *pdev = to_pci_dev(dev->dev);
        u32 val = REG_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
 
        if (cdv_backlight_combination_mode(dev)) {
                u8 lbpc;
 
                val &= ~1;
-               pci_read_config_byte(dev->pdev, 0xF4, &lbpc);
+               pci_read_config_byte(pdev, 0xF4, &lbpc);
                val *= lbpc;
        }
        return (val * 100)/cdv_get_max_backlight(dev);
 static int cdv_set_brightness(struct backlight_device *bd)
 {
        struct drm_device *dev = bl_get_data(bd);
+       struct pci_dev *pdev = to_pci_dev(dev->dev);
        int level = bd->props.brightness;
        u32 blc_pwm_ctl;
 
                lbpc = level * 0xfe / max + 1;
                level /= lbpc;
 
-               pci_write_config_byte(dev->pdev, 0xF4, lbpc);
+               pci_write_config_byte(pdev, 0xF4, lbpc);
        }
 
        blc_pwm_ctl = REG_READ(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
 static void cdv_init_pm(struct drm_device *dev)
 {
        struct drm_psb_private *dev_priv = dev->dev_private;
+       struct pci_dev *pdev = to_pci_dev(dev->dev);
        u32 pwr_cnt;
-       int domain = pci_domain_nr(dev->pdev->bus);
+       int domain = pci_domain_nr(pdev->bus);
        int i;
 
        dev_priv->apm_base = CDV_MSG_READ32(domain, PSB_PUNIT_PORT,
 
 static void cdv_errata(struct drm_device *dev)
 {
+       struct pci_dev *pdev = to_pci_dev(dev->dev);
+
        /* Disable bonus launch.
         *      CPU and GPU competes for memory and display misses updates and
         *      flickers. Worst with dual core, dual displays.
         *      Bonus Launch to work around the issue, by degrading
         *      performance.
         */
-        CDV_MSG_WRITE32(pci_domain_nr(dev->pdev->bus), 3, 0x30, 0x08027108);
+        CDV_MSG_WRITE32(pci_domain_nr(pdev->bus), 3, 0x30, 0x08027108);
 }
 
 /**
 static int cdv_save_display_registers(struct drm_device *dev)
 {
        struct drm_psb_private *dev_priv = dev->dev_private;
+       struct pci_dev *pdev = to_pci_dev(dev->dev);
        struct psb_save_area *regs = &dev_priv->regs;
        struct drm_connector *connector;
 
        dev_dbg(dev->dev, "Saving GPU registers.\n");
 
-       pci_read_config_byte(dev->pdev, 0xF4, ®s->cdv.saveLBB);
+       pci_read_config_byte(pdev, 0xF4, ®s->cdv.saveLBB);
 
        regs->cdv.saveDSPCLK_GATE_D = REG_READ(DSPCLK_GATE_D);
        regs->cdv.saveRAMCLK_GATE_D = REG_READ(RAMCLK_GATE_D);
 static int cdv_restore_display_registers(struct drm_device *dev)
 {
        struct drm_psb_private *dev_priv = dev->dev_private;
+       struct pci_dev *pdev = to_pci_dev(dev->dev);
        struct psb_save_area *regs = &dev_priv->regs;
        struct drm_connector *connector;
        u32 temp;
 
-       pci_write_config_byte(dev->pdev, 0xF4, regs->cdv.saveLBB);
+       pci_write_config_byte(pdev, 0xF4, regs->cdv.saveLBB);
 
        REG_WRITE(DSPCLK_GATE_D, regs->cdv.saveDSPCLK_GATE_D);
        REG_WRITE(RAMCLK_GATE_D, regs->cdv.saveRAMCLK_GATE_D);
 static int cdv_chip_setup(struct drm_device *dev)
 {
        struct drm_psb_private *dev_priv = dev->dev_private;
+       struct pci_dev *pdev = to_pci_dev(dev->dev);
        INIT_WORK(&dev_priv->hotplug_work, cdv_hotplug_work_func);
 
-       if (pci_enable_msi(dev->pdev))
+       if (pci_enable_msi(pdev))
                dev_warn(dev->dev, "Enabling MSI failed!\n");
        dev_priv->regmap = cdv_regmap;
        gma_get_core_freq(dev);
 
        gma_encoder->ddc_bus = psb_intel_i2c_create(dev,
                                                          i2c_reg, "CRTDDC_A");
        if (!gma_encoder->ddc_bus) {
-               dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
-                          "failed.\n");
+               dev_printk(KERN_ERR, dev->dev, "DDC bus registration failed.\n");
                goto failed_ddc;
        }
 
 
                                                         "LVDSBLC_B");
        if (!gma_encoder->i2c_bus) {
                dev_printk(KERN_ERR,
-                       &dev->pdev->dev, "I2C bus registration failed.\n");
+                       dev->dev, "I2C bus registration failed.\n");
                goto failed_blc_i2c;
        }
        gma_encoder->i2c_bus->slave_addr = 0x2C;
                                                         GPIOC,
                                                         "LVDSDDC_C");
        if (!gma_encoder->ddc_bus) {
-               dev_printk(KERN_ERR, &dev->pdev->dev,
+               dev_printk(KERN_ERR, dev->dev,
                           "DDC bus registration " "failed.\n");
                goto failed_ddc;
        }
 
 {
        struct drm_device *dev = fb_helper->dev;
        struct drm_psb_private *dev_priv = dev->dev_private;
+       struct pci_dev *pdev = to_pci_dev(dev->dev);
        struct fb_info *info;
        struct drm_framebuffer *fb;
        struct drm_mode_fb_cmd2 mode_cmd;
 
        drm_fb_helper_fill_info(info, fb_helper, sizes);
 
-       info->fix.mmio_start = pci_resource_start(dev->pdev, 0);
-       info->fix.mmio_len = pci_resource_len(dev->pdev, 0);
+       info->fix.mmio_start = pci_resource_start(pdev, 0);
+       info->fix.mmio_len = pci_resource_len(pdev, 0);
 
        /* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */
 
 {
        struct drm_psb_private *dev_priv = dev->dev_private;
        struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
+       struct pci_dev *pdev = to_pci_dev(dev->dev);
        int i;
 
        drm_mode_config_init(dev);
 
        /* set memory base */
        /* Oaktrail and Poulsbo should use BAR 2*/
-       pci_read_config_dword(dev->pdev, PSB_BSM, (u32 *)
-                                       &(dev->mode_config.fb_base));
+       pci_read_config_dword(pdev, PSB_BSM, (u32 *)&(dev->mode_config.fb_base));
 
        /* num pipes is 2 for PSB but 1 for Mrst */
        for (i = 0; i < dev_priv->num_pipe; i++)
 
 void gma_get_core_freq(struct drm_device *dev)
 {
        uint32_t clock;
+       struct pci_dev *pdev = to_pci_dev(dev->dev);
        struct pci_dev *pci_root =
-               pci_get_domain_bus_and_slot(pci_domain_nr(dev->pdev->bus),
+               pci_get_domain_bus_and_slot(pci_domain_nr(pdev->bus),
                                            0, 0);
        struct drm_psb_private *dev_priv = dev->dev_private;
 
 
        if (!dev_priv->rpm_enabled)
                return drm_crtc_helper_set_config(set, ctx);
 
-       pm_runtime_forbid(&dev->pdev->dev);
+       pm_runtime_forbid(dev->dev);
        ret = drm_crtc_helper_set_config(set, ctx);
-       pm_runtime_allow(&dev->pdev->dev);
+       pm_runtime_allow(dev->dev);
 
        return ret;
 }
 
 void psb_gtt_takedown(struct drm_device *dev)
 {
        struct drm_psb_private *dev_priv = dev->dev_private;
+       struct pci_dev *pdev = to_pci_dev(dev->dev);
 
        if (dev_priv->gtt_map) {
                iounmap(dev_priv->gtt_map);
                dev_priv->gtt_map = NULL;
        }
        if (dev_priv->gtt_initialized) {
-               pci_write_config_word(dev->pdev, PSB_GMCH_CTRL,
+               pci_write_config_word(pdev, PSB_GMCH_CTRL,
                                      dev_priv->gmch_ctrl);
                PSB_WVDC32(dev_priv->pge_ctl, PSB_PGETBL_CTL);
                (void) PSB_RVDC32(PSB_PGETBL_CTL);
 int psb_gtt_init(struct drm_device *dev, int resume)
 {
        struct drm_psb_private *dev_priv = dev->dev_private;
+       struct pci_dev *pdev = to_pci_dev(dev->dev);
        unsigned gtt_pages;
        unsigned long stolen_size, vram_stolen_size;
        unsigned i, num_pages;
        pg = &dev_priv->gtt;
 
        /* Enable the GTT */
-       pci_read_config_word(dev->pdev, PSB_GMCH_CTRL, &dev_priv->gmch_ctrl);
-       pci_write_config_word(dev->pdev, PSB_GMCH_CTRL,
+       pci_read_config_word(pdev, PSB_GMCH_CTRL, &dev_priv->gmch_ctrl);
+       pci_write_config_word(pdev, PSB_GMCH_CTRL,
                              dev_priv->gmch_ctrl | _PSB_GMCH_ENABLED);
 
        dev_priv->pge_ctl = PSB_RVDC32(PSB_PGETBL_CTL);
         */
        pg->mmu_gatt_start = 0xE0000000;
 
-       pg->gtt_start = pci_resource_start(dev->pdev, PSB_GTT_RESOURCE);
-       gtt_pages = pci_resource_len(dev->pdev, PSB_GTT_RESOURCE)
+       pg->gtt_start = pci_resource_start(pdev, PSB_GTT_RESOURCE);
+       gtt_pages = pci_resource_len(pdev, PSB_GTT_RESOURCE)
                                                                >> PAGE_SHIFT;
        /* CDV doesn't report this. In which case the system has 64 gtt pages */
        if (pg->gtt_start == 0 || gtt_pages == 0) {
                pg->gtt_start = dev_priv->pge_ctl;
        }
 
-       pg->gatt_start = pci_resource_start(dev->pdev, PSB_GATT_RESOURCE);
-       pg->gatt_pages = pci_resource_len(dev->pdev, PSB_GATT_RESOURCE)
+       pg->gatt_start = pci_resource_start(pdev, PSB_GATT_RESOURCE);
+       pg->gatt_pages = pci_resource_len(pdev, PSB_GATT_RESOURCE)
                                                                >> PAGE_SHIFT;
-       dev_priv->gtt_mem = &dev->pdev->resource[PSB_GATT_RESOURCE];
+       dev_priv->gtt_mem = &pdev->resource[PSB_GATT_RESOURCE];
 
        if (pg->gatt_pages == 0 || pg->gatt_start == 0) {
                static struct resource fudge;   /* Preferably peppermint */
                dev_priv->gtt_mem = &fudge;
        }
 
-       pci_read_config_dword(dev->pdev, PSB_BSM, &dev_priv->stolen_base);
+       pci_read_config_dword(pdev, PSB_BSM, &dev_priv->stolen_base);
        vram_stolen_size = pg->gtt_phys_start - dev_priv->stolen_base
                                                                - PAGE_SIZE;
 
 
 int psb_intel_init_bios(struct drm_device *dev)
 {
        struct drm_psb_private *dev_priv = dev->dev_private;
-       struct pci_dev *pdev = dev->pdev;
+       struct pci_dev *pdev = to_pci_dev(dev->dev);
        struct vbt_header *vbt = NULL;
        struct bdb_header *bdb = NULL;
        u8 __iomem *bios = NULL;
 
                 "gma500 GPIO%c", "?BACDE?F"[pin]);
        gpio->adapter.owner = THIS_MODULE;
        gpio->adapter.algo_data = &gpio->algo;
-       gpio->adapter.dev.parent = &dev_priv->dev->pdev->dev;
+       gpio->adapter.dev.parent = dev_priv->dev->dev;
        gpio->algo.setsda = set_data;
        gpio->algo.setscl = set_clock;
        gpio->algo.getsda = get_data;
                         "gma500 gmbus %s",
                         names[i]);
 
-               bus->adapter.dev.parent = &dev->pdev->dev;
+               bus->adapter.dev.parent = dev->dev;
                bus->adapter.algo_data  = dev_priv;
 
                bus->adapter.algo = &gmbus_algorithm;
 
        snprintf(chan->adapter.name, I2C_NAME_SIZE, "intel drm %s", name);
        chan->adapter.owner = THIS_MODULE;
        chan->adapter.algo_data = &chan->algo;
-       chan->adapter.dev.parent = &dev->pdev->dev;
+       chan->adapter.dev.parent = dev->dev;
        chan->algo.setsda = set_data;
        chan->algo.setscl = set_clock;
        chan->algo.getsda = get_data;
 
 static int mdfld_chip_setup(struct drm_device *dev)
 {
        struct drm_psb_private *dev_priv = dev->dev_private;
-       if (pci_enable_msi(dev->pdev))
+       struct pci_dev *pdev = to_pci_dev(dev->dev);
+
+       if (pci_enable_msi(pdev))
                dev_warn(dev->dev, "Enabling MSI failed!\n");
        dev_priv->regmap = mdfld_regmap;
 
 
                REG_WRITE(pipeconf_reg, BIT(31));
 
                if (REG_BIT_WAIT(pipeconf_reg, 1, 30))
-                       dev_err(&dev->pdev->dev, "%s: Pipe enable timeout\n",
+                       dev_err(dev->dev, "%s: Pipe enable timeout\n",
                                __func__);
 
                /*Set up display plane */
                REG_FLD_MOD(pipeconf_reg, 0, 31, 31);
 
                if (REG_BIT_WAIT(pipeconf_reg, 0, 30))
-                       dev_err(&dev->pdev->dev, "%s: Pipe disable timeout\n",
+                       dev_err(dev->dev, "%s: Pipe disable timeout\n",
                                __func__);
 
                if (REG_BIT_WAIT(MIPI_GEN_FIFO_STAT_REG(pipe), 1, 28))
-                       dev_err(&dev->pdev->dev, "%s: FIFO not empty\n",
+                       dev_err(dev->dev, "%s: FIFO not empty\n",
                                __func__);
        }
 }
                REG_WRITE(MRST_DPLL_A, 0x80800000);
 
                if (REG_BIT_WAIT(pipeconf_reg, 1, 29))
-                       dev_err(&dev->pdev->dev, "%s: DSI PLL lock timeout\n",
+                       dev_err(dev->dev, "%s: DSI PLL lock timeout\n",
                                __func__);
 
                REG_WRITE(MIPI_DPHY_PARAM_REG(pipe), 0x2A0c6008);
 
 static void mid_get_fuse_settings(struct drm_device *dev)
 {
        struct drm_psb_private *dev_priv = dev->dev_private;
+       struct pci_dev *pdev = to_pci_dev(dev->dev);
        struct pci_dev *pci_root =
-               pci_get_domain_bus_and_slot(pci_domain_nr(dev->pdev->bus),
+               pci_get_domain_bus_and_slot(pci_domain_nr(pdev->bus),
                                            0, 0);
        uint32_t fuse_value = 0;
        uint32_t fuse_value_tmp = 0;
 static void mid_get_pci_revID(struct drm_psb_private *dev_priv)
 {
        uint32_t platform_rev_id = 0;
-       int domain = pci_domain_nr(dev_priv->dev->pdev->bus);
+       struct pci_dev *pdev = to_pci_dev(dev_priv->dev->dev);
+       int domain = pci_domain_nr(pdev->bus);
        struct pci_dev *pci_gfx_root =
                pci_get_domain_bus_and_slot(domain, 0, PCI_DEVFN(2, 0));
 
 static void mid_get_vbt_data(struct drm_psb_private *dev_priv)
 {
        struct drm_device *dev = dev_priv->dev;
+       struct pci_dev *pdev = to_pci_dev(dev->dev);
        u32 addr;
        u8 __iomem *vbt_virtual;
        struct mid_vbt_header vbt_header;
        struct pci_dev *pci_gfx_root =
-               pci_get_domain_bus_and_slot(pci_domain_nr(dev->pdev->bus),
+               pci_get_domain_bus_and_slot(pci_domain_nr(pdev->bus),
                                            0, PCI_DEVFN(2, 0));
        int ret = -1;
 
 
 static int oaktrail_chip_setup(struct drm_device *dev)
 {
        struct drm_psb_private *dev_priv = dev->dev_private;
+       struct pci_dev *pdev = to_pci_dev(dev->dev);
        int ret;
 
-       if (pci_enable_msi(dev->pdev))
+       if (pci_enable_msi(pdev))
                dev_warn(dev->dev, "Enabling MSI failed!\n");
 
        dev_priv->regmap = oaktrail_regmap;
 
                        pp_status = REG_READ(PP_STATUS);
                } while (pp_status & PP_ON);
                dev_priv->is_lvds_on = false;
-               pm_request_idle(&dev->pdev->dev);
+               pm_request_idle(dev->dev);
        }
        gma_power_end(dev);
 }
 
        strncpy(chan->adapter.name, "gma500 LPC",  I2C_NAME_SIZE - 1);
        chan->adapter.owner = THIS_MODULE;
        chan->adapter.algo_data = &chan->algo;
-       chan->adapter.dev.parent = &dev->pdev->dev;
+       chan->adapter.dev.parent = dev->dev;
        chan->algo.setsda = set_data;
        chan->algo.setscl = set_clock;
        chan->algo.getsda = get_data;
 
 int psb_intel_opregion_setup(struct drm_device *dev)
 {
        struct drm_psb_private *dev_priv = dev->dev_private;
+       struct pci_dev *pdev = to_pci_dev(dev->dev);
        struct psb_intel_opregion *opregion = &dev_priv->opregion;
        u32 opregion_phy, mboxes;
        void __iomem *base;
        int err = 0;
 
-       pci_read_config_dword(dev->pdev, PCI_ASLS, &opregion_phy);
+       pci_read_config_dword(pdev, PCI_ASLS, &opregion_phy);
        if (opregion_phy == 0) {
                DRM_DEBUG_DRIVER("ACPI Opregion not supported\n");
                return -ENOTSUPP;
 
  */
 void gma_power_uninit(struct drm_device *dev)
 {
-       pm_runtime_disable(&dev->pdev->dev);
-       pm_runtime_set_suspended(&dev->pdev->dev);
+       pm_runtime_disable(dev->dev);
+       pm_runtime_set_suspended(dev->dev);
 }
 
 /**
 bool gma_power_begin(struct drm_device *dev, bool force_on)
 {
        struct drm_psb_private *dev_priv = dev->dev_private;
+       struct pci_dev *pdev = to_pci_dev(dev->dev);
        int ret;
        unsigned long flags;
 
        /* Power already on ? */
        if (dev_priv->display_power) {
                dev_priv->display_count++;
-               pm_runtime_get(&dev->pdev->dev);
+               pm_runtime_get(dev->dev);
                spin_unlock_irqrestore(&power_ctrl_lock, flags);
                return true;
        }
                goto out_false;
 
        /* Ok power up needed */
-       ret = gma_resume_pci(dev->pdev);
+       ret = gma_resume_pci(pdev);
        if (ret == 0) {
                psb_irq_preinstall(dev);
                psb_irq_postinstall(dev);
-               pm_runtime_get(&dev->pdev->dev);
+               pm_runtime_get(dev->dev);
                dev_priv->display_count++;
                spin_unlock_irqrestore(&power_ctrl_lock, flags);
                return true;
        dev_priv->display_count--;
        WARN_ON(dev_priv->display_count < 0);
        spin_unlock_irqrestore(&power_ctrl_lock, flags);
-       pm_runtime_put(&dev->pdev->dev);
+       pm_runtime_put(dev->dev);
 }
 
 int psb_runtime_suspend(struct device *dev)
 
 
 static int psb_driver_load(struct drm_device *dev, unsigned long flags)
 {
+       struct pci_dev *pdev = to_pci_dev(dev->dev);
        struct drm_psb_private *dev_priv;
        unsigned long resource_start, resource_len;
        unsigned long irqflags;
 
        pg = &dev_priv->gtt;
 
-       pci_set_master(dev->pdev);
+       pci_set_master(pdev);
 
        dev_priv->num_pipe = dev_priv->ops->pipes;
 
-       resource_start = pci_resource_start(dev->pdev, PSB_MMIO_RESOURCE);
+       resource_start = pci_resource_start(pdev, PSB_MMIO_RESOURCE);
 
        dev_priv->vdc_reg =
            ioremap(resource_start + PSB_VDC_OFFSET, PSB_VDC_SIZE);
                goto out_err;
 
        if (IS_MRST(dev)) {
-               int domain = pci_domain_nr(dev->pdev->bus);
+               int domain = pci_domain_nr(pdev->bus);
 
                dev_priv->aux_pdev =
                        pci_get_domain_bus_and_slot(domain, 0,
        PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R);
        spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags);
 
-       drm_irq_install(dev, dev->pdev->irq);
+       drm_irq_install(dev, pdev->irq);
 
        dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
 
        psb_intel_opregion_enable_asle(dev);
 #if 0
        /* Enable runtime pm at last */
-       pm_runtime_enable(&dev->pdev->dev);
-       pm_runtime_set_active(&dev->pdev->dev);
+       pm_runtime_enable(dev->dev);
+       pm_runtime_set_active(dev->dev);
 #endif
        /* Intel drm driver load is done, continue doing pvr load */
        return 0;
 
        if (runtime_allowed == 1 && dev_priv->is_lvds_on) {
                runtime_allowed++;
-               pm_runtime_allow(&dev->pdev->dev);
+               pm_runtime_allow(dev->dev);
                dev_priv->rpm_enabled = 1;
        }
        return drm_ioctl(filp, cmd, arg);
                goto err_pci_disable_device;
        }
 
-       dev->pdev = pdev;
        pci_set_drvdata(pdev, dev);
 
        ret = psb_driver_load(dev, ent->driver_data);
 
        CHIP_MFLD_0130 = 3,             /* Medfield */
 };
 
-#define IS_PSB(dev) (((dev)->pdev->device & 0xfffe) == 0x8108)
-#define IS_MRST(dev) (((dev)->pdev->device & 0xfff0) == 0x4100)
-#define IS_MFLD(dev) (((dev)->pdev->device & 0xfff8) == 0x0130)
-#define IS_CDV(dev) (((dev)->pdev->device & 0xfff0) == 0x0be0)
+#define IS_PSB(drm) ((to_pci_dev((drm)->dev)->device & 0xfffe) == 0x8108)
+#define IS_MRST(drm) ((to_pci_dev((drm)->dev)->device & 0xfff0) == 0x4100)
+#define IS_MFLD(drm) ((to_pci_dev((drm)->dev)->device & 0xfff8) == 0x0130)
+#define IS_CDV(drm) ((to_pci_dev((drm)->dev)->device & 0xfff0) == 0x0be0)
 
 /* Hardware offsets */
 #define PSB_VDC_OFFSET          0x00000000
 
        lvds_priv->i2c_bus = psb_intel_i2c_create(dev, GPIOB, "LVDSBLC_B");
        if (!lvds_priv->i2c_bus) {
                dev_printk(KERN_ERR,
-                       &dev->pdev->dev, "I2C bus registration failed.\n");
+                       dev->dev, "I2C bus registration failed.\n");
                goto failed_blc_i2c;
        }
        lvds_priv->i2c_bus->slave_addr = 0x2C;
        /* Set up the DDC bus. */
        lvds_priv->ddc_bus = psb_intel_i2c_create(dev, GPIOC, "LVDSDDC_C");
        if (!lvds_priv->ddc_bus) {
-               dev_printk(KERN_ERR, &dev->pdev->dev,
+               dev_printk(KERN_ERR, dev->dev,
                           "DDC bus registration " "failed.\n");
                goto failed_ddc;
        }
 
        sdvo->ddc.owner = THIS_MODULE;
        sdvo->ddc.class = I2C_CLASS_DDC;
        snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
-       sdvo->ddc.dev.parent = &dev->pdev->dev;
+       sdvo->ddc.dev.parent = dev->dev;
        sdvo->ddc.algo_data = sdvo;
        sdvo->ddc.algo = &psb_intel_sdvo_ddc_proxy;
 
 
        ret = intel_scu_ipc_ioread8(GPIOPWMCTRL, &pwmctrl);
        if (ret || pwmctrl != 0x01) {
                if (ret)
-                       dev_err(&dev->pdev->dev, "GPIOPWMCTRL read failed\n");
+                       dev_err(dev->dev, "GPIOPWMCTRL read failed\n");
                else
-                       dev_warn(&dev->pdev->dev, "GPIOPWMCTRL was not set to system clock (pwmctrl = 0x%02x)\n", pwmctrl);
+                       dev_warn(dev->dev, "GPIOPWMCTRL was not set to system clock (pwmctrl = 0x%02x)\n", pwmctrl);
 
                ret = intel_scu_ipc_iowrite8(GPIOPWMCTRL, 0x01);
                if (ret)
-                       dev_err(&dev->pdev->dev, "GPIOPWMCTRL set failed\n");
+                       dev_err(dev->dev, "GPIOPWMCTRL set failed\n");
        }
 
        clkdiv = calc_clkdiv(SYSTEMCLK, PWM_FREQUENCY);
                ret = intel_scu_ipc_iowrite8(PWM0CLKDIV0, clkdiv & 0xff);
 
        if (ret)
-               dev_err(&dev->pdev->dev, "PWM0CLKDIV set failed\n");
+               dev_err(dev->dev, "PWM0CLKDIV set failed\n");
        else
-               dev_dbg(&dev->pdev->dev, "PWM0CLKDIV set to 0x%04x (%d Hz)\n",
+               dev_dbg(dev->dev, "PWM0CLKDIV set to 0x%04x (%d Hz)\n",
                        clkdiv, PWM_FREQUENCY);
 }
 
 {
        struct drm_display_mode *mode;
 
-       dev_dbg(&dev->pdev->dev, "%s\n", __func__);
+       dev_dbg(dev->dev, "%s\n", __func__);
 
        mode = kzalloc(sizeof(*mode), GFP_KERNEL);
        if (!mode)
        mode->vtotal = 838;
        mode->clock = 33324 << 1;
 
-       dev_info(&dev->pdev->dev, "hdisplay(w) = %d\n", mode->hdisplay);
-       dev_info(&dev->pdev->dev, "vdisplay(h) = %d\n", mode->vdisplay);
-       dev_info(&dev->pdev->dev, "HSS = %d\n", mode->hsync_start);
-       dev_info(&dev->pdev->dev, "HSE = %d\n", mode->hsync_end);
-       dev_info(&dev->pdev->dev, "htotal = %d\n", mode->htotal);
-       dev_info(&dev->pdev->dev, "VSS = %d\n", mode->vsync_start);
-       dev_info(&dev->pdev->dev, "VSE = %d\n", mode->vsync_end);
-       dev_info(&dev->pdev->dev, "vtotal = %d\n", mode->vtotal);
-       dev_info(&dev->pdev->dev, "clock = %d\n", mode->clock);
+       dev_info(dev->dev, "hdisplay(w) = %d\n", mode->hdisplay);
+       dev_info(dev->dev, "vdisplay(h) = %d\n", mode->vdisplay);
+       dev_info(dev->dev, "HSS = %d\n", mode->hsync_start);
+       dev_info(dev->dev, "HSE = %d\n", mode->hsync_end);
+       dev_info(dev->dev, "htotal = %d\n", mode->htotal);
+       dev_info(dev->dev, "VSS = %d\n", mode->vsync_start);
+       dev_info(dev->dev, "VSE = %d\n", mode->vsync_end);
+       dev_info(dev->dev, "vtotal = %d\n", mode->vtotal);
+       dev_info(dev->dev, "clock = %d\n", mode->clock);
 
        drm_mode_set_name(mode);
        drm_mode_set_crtcinfo(mode, 0);
 {
        int r;
 
-       dev_dbg(&dev->pdev->dev, "%s\n", __func__);
+       dev_dbg(dev->dev, "%s\n", __func__);
 
        cmi_lcd_hack_create_device();
 
        r = i2c_add_driver(&cmi_lcd_i2c_driver);
        if (r < 0)
-               dev_err(&dev->pdev->dev,
+               dev_err(dev->dev,
                        "%s: i2c_add_driver() for %s failed (%d)\n",
                        __func__, cmi_lcd_i2c_driver.driver.name, r);
 
        r = i2c_add_driver(&tc35876x_bridge_i2c_driver);
        if (r < 0)
-               dev_err(&dev->pdev->dev,
+               dev_err(dev->dev,
                        "%s: i2c_add_driver() for %s failed (%d)\n",
                        __func__, tc35876x_bridge_i2c_driver.driver.name, r);