riscv: dts: starfive: Add JH7100 MMC nodes

Add device tree nodes for the Synopsis MMC controllers on the
StarFive JH7100 SoC.

Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi
index 0cafac437746c0053a14f66d3b0d230a78ada4b8..c216aaecac53f2d7d1ec47b4f250ea5ae08e11cb 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7100.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi
@@ -178,6 +178,32 @@
                        riscv,ndev = <133>;
                };
 
+               sdio0: mmc@10000000 {
+                       compatible = "snps,dw-mshc";
+                       reg = <0x0 0x10000000 0x0 0x10000>;
+                       clocks = <&clkgen JH7100_CLK_SDIO0_AHB>,
+                                <&clkgen JH7100_CLK_SDIO0_CCLKINT_INV>;
+                       clock-names = "biu", "ciu";
+                       interrupts = <4>;
+                       data-addr = <0>;
+                       fifo-depth = <32>;
+                       fifo-watermark-aligned;
+                       status = "disabled";
+               };
+
+               sdio1: mmc@10010000 {
+                       compatible = "snps,dw-mshc";
+                       reg = <0x0 0x10010000 0x0 0x10000>;
+                       clocks = <&clkgen JH7100_CLK_SDIO1_AHB>,
+                                <&clkgen JH7100_CLK_SDIO1_CCLKINT_INV>;
+                       clock-names = "biu", "ciu";
+                       interrupts = <5>;
+                       data-addr = <0>;
+                       fifo-depth = <32>;
+                       fifo-watermark-aligned;
+                       status = "disabled";
+               };
+
                clkgen: clock-controller@11800000 {
                        compatible = "starfive,jh7100-clkgen";
                        reg = <0x0 0x11800000 0x0 0x10000>;