ASoC: meson: axg-spdifin: use max width for rate detection

Use maximum width between 2 edges to setup spdifin thresholds
and detect the input sample rate. This comes from Amlogic SDK and
seems to be marginally more reliable than minimum width.

This is done to align with a future eARC support.
No issue was reported with minimum width so far, this is considered
to be an update so no Fixes tag is set.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://msgid.link/r/20240223175116.2005407-5-jbrunet@baylibre.com
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/sound/soc/meson/axg-spdifin.c b/sound/soc/meson/axg-spdifin.c
index bc2f2849ecfbce1f5e12d8cdc7d56858b6c56798..e721f579321ec22dd18af220f48d224ff8c8cfc3 100644 (file)
--- a/sound/soc/meson/axg-spdifin.c
+++ b/sound/soc/meson/axg-spdifin.c
@@ -179,9 +179,9 @@ static int axg_spdifin_sample_mode_config(struct snd_soc_dai *dai,
                           SPDIFIN_CTRL1_BASE_TIMER,
                           FIELD_PREP(SPDIFIN_CTRL1_BASE_TIMER, rate / 1000));
 
-       /* Threshold based on the minimum width between two edges */
+       /* Threshold based on the maximum width between two edges */
        regmap_update_bits(priv->map, SPDIFIN_CTRL0,
-                          SPDIFIN_CTRL0_WIDTH_SEL, SPDIFIN_CTRL0_WIDTH_SEL);
+                          SPDIFIN_CTRL0_WIDTH_SEL, 0);
 
        /* Calculate the last timer which has no threshold */
        t_next = axg_spdifin_mode_timer(priv, i, rate);
@@ -199,7 +199,7 @@ static int axg_spdifin_sample_mode_config(struct snd_soc_dai *dai,
                axg_spdifin_write_timer(priv->map, i, t);
 
                /* Set the threshold value */
-               axg_spdifin_write_threshold(priv->map, i, t + t_next);
+               axg_spdifin_write_threshold(priv->map, i, 3 * (t + t_next));
 
                /* Save the current timer for the next threshold calculation */
                t_next = t;