cxgb4: collect MC memory dump

Use meminfo to get base address and size of MC memory.  Also use same
meminfo for EDC memory dumps.

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/chelsio/cxgb4/cudbg_entity.h b/drivers/net/ethernet/chelsio/cxgb4/cudbg_entity.h
index 348d7e1eb78a85c8a70a9b317ded43a5cd882172..57417f76d4a8d1449790ae7b1c3d251f20ebdcef 100644 (file)
--- a/drivers/net/ethernet/chelsio/cxgb4/cudbg_entity.h
+++ b/drivers/net/ethernet/chelsio/cxgb4/cudbg_entity.h
@@ -18,17 +18,14 @@
 #ifndef __CUDBG_ENTITY_H__
 #define __CUDBG_ENTITY_H__
 
-#define EDC0_FLAG 3
-#define EDC1_FLAG 4
+#define EDC0_FLAG 0
+#define EDC1_FLAG 1
+#define MC_FLAG 2
+#define MC0_FLAG 3
+#define MC1_FLAG 4
 
 #define CUDBG_ENTITY_SIGNATURE 0xCCEDB001
 
-struct card_mem {
-       u16 size_edc0;
-       u16 size_edc1;
-       u16 mem_flag;
-};
-
 struct cudbg_mbox_log {
        struct mbox_cmd entry;
        u32 hi[MBOX_LEN / 8];

diff --git a/drivers/net/ethernet/chelsio/cxgb4/cudbg_if.h b/drivers/net/ethernet/chelsio/cxgb4/cudbg_if.h
index 5a5cea2fda6900adbf89383d55040a821bd78c28..200ff82a213c8a7d059d7a623091375626f47a4d 100644 (file)
--- a/drivers/net/ethernet/chelsio/cxgb4/cudbg_if.h
+++ b/drivers/net/ethernet/chelsio/cxgb4/cudbg_if.h
@@ -47,6 +47,8 @@ enum cudbg_dbg_entity_type {
        CUDBG_CIM_OBQ_NCSI = 17,
        CUDBG_EDC0 = 18,
        CUDBG_EDC1 = 19,
+       CUDBG_MC0 = 20,
+       CUDBG_MC1 = 21,
        CUDBG_RSS = 22,
        CUDBG_RSS_VF_CONF = 25,
        CUDBG_PATH_MTU = 27,

diff --git a/drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c b/drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c
index 21dfd70ad08ab02e446e41162bb254d94f07af57..2fb27e9f0bceee0317651095c6135ff34efba1ea 100644 (file)
--- a/drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c
@@ -682,6 +682,42 @@ int cudbg_collect_obq_sge_rx_q1(struct cudbg_init *pdbg_init,
        return cudbg_read_cim_obq(pdbg_init, dbg_buff, cudbg_err, 7);
 }
 
+static int cudbg_meminfo_get_mem_index(struct adapter *padap,
+                                      struct cudbg_meminfo *mem_info,
+                                      u8 mem_type, u8 *idx)
+{
+       u8 i, flag;
+
+       switch (mem_type) {
+       case MEM_EDC0:
+               flag = EDC0_FLAG;
+               break;
+       case MEM_EDC1:
+               flag = EDC1_FLAG;
+               break;
+       case MEM_MC0:
+               /* Some T5 cards have both MC0 and MC1. */
+               flag = is_t5(padap->params.chip) ? MC0_FLAG : MC_FLAG;
+               break;
+       case MEM_MC1:
+               flag = MC1_FLAG;
+               break;
+       default:
+               return CUDBG_STATUS_ENTITY_NOT_FOUND;
+       }
+
+       for (i = 0; i < mem_info->avail_c; i++) {
+               if (mem_info->avail[i].idx == flag) {
+                       *idx = i;
+                       return 0;
+               }
+       }
+
+       return CUDBG_STATUS_ENTITY_NOT_FOUND;
+}
+
+#define CUDBG_YIELD_ITERATION 256
+
 static int cudbg_read_fw_mem(struct cudbg_init *pdbg_init,
                             struct cudbg_buffer *dbg_buff, u8 mem_type,
                             unsigned long tot_len,
@@ -690,10 +726,20 @@ static int cudbg_read_fw_mem(struct cudbg_init *pdbg_init,
        unsigned long bytes, bytes_left, bytes_read = 0;
        struct adapter *padap = pdbg_init->adap;
        struct cudbg_buffer temp_buff = { 0 };
+       u32 yield_count = 0;
        int rc = 0;
 
        bytes_left = tot_len;
        while (bytes_left > 0) {
+               /* As MC size is huge and read through PIO access, this
+                * loop will hold cpu for a longer time. OS may think that
+                * the process is hanged and will generate CPU stall traces.
+                * So yield the cpu regularly.
+                */
+               yield_count++;
+               if (!(yield_count % CUDBG_YIELD_ITERATION))
+                       schedule();
+
                bytes = min_t(unsigned long, bytes_left,
                              (unsigned long)CUDBG_CHUNK_SIZE);
                rc = cudbg_get_buff(dbg_buff, bytes, &temp_buff);
@@ -717,27 +763,6 @@ static int cudbg_read_fw_mem(struct cudbg_init *pdbg_init,
        return rc;
 }
 
-static void cudbg_collect_mem_info(struct cudbg_init *pdbg_init,
-                                  struct card_mem *mem_info)
-{
-       struct adapter *padap = pdbg_init->adap;
-       u32 value;
-
-       value = t4_read_reg(padap, MA_EDRAM0_BAR_A);
-       value = EDRAM0_SIZE_G(value);
-       mem_info->size_edc0 = (u16)value;
-
-       value = t4_read_reg(padap, MA_EDRAM1_BAR_A);
-       value = EDRAM1_SIZE_G(value);
-       mem_info->size_edc1 = (u16)value;
-
-       value = t4_read_reg(padap, MA_TARGET_MEM_ENABLE_A);
-       if (value & EDRAM0_ENABLE_F)
-               mem_info->mem_flag |= (1 << EDC0_FLAG);
-       if (value & EDRAM1_ENABLE_F)
-               mem_info->mem_flag |= (1 << EDC1_FLAG);
-}
-
 static void cudbg_t4_fwcache(struct cudbg_init *pdbg_init,
                             struct cudbg_error *cudbg_err)
 {
@@ -757,37 +782,25 @@ static int cudbg_collect_mem_region(struct cudbg_init *pdbg_init,
                                    struct cudbg_error *cudbg_err,
                                    u8 mem_type)
 {
-       struct card_mem mem_info = {0};
-       unsigned long flag, size;
+       struct adapter *padap = pdbg_init->adap;
+       struct cudbg_meminfo mem_info;
+       unsigned long size;
+       u8 mc_idx;
        int rc;
 
+       memset(&mem_info, 0, sizeof(struct cudbg_meminfo));
+       rc = cudbg_fill_meminfo(padap, &mem_info);
+       if (rc)
+               return rc;
+
        cudbg_t4_fwcache(pdbg_init, cudbg_err);
-       cudbg_collect_mem_info(pdbg_init, &mem_info);
-       switch (mem_type) {
-       case MEM_EDC0:
-               flag = (1 << EDC0_FLAG);
-               size = cudbg_mbytes_to_bytes(mem_info.size_edc0);
-               break;
-       case MEM_EDC1:
-               flag = (1 << EDC1_FLAG);
-               size = cudbg_mbytes_to_bytes(mem_info.size_edc1);
-               break;
-       default:
-               rc = CUDBG_STATUS_ENTITY_NOT_FOUND;
-               goto err;
-       }
+       rc = cudbg_meminfo_get_mem_index(padap, &mem_info, mem_type, &mc_idx);
+       if (rc)
+               return rc;
 
-       if (mem_info.mem_flag & flag) {
-               rc = cudbg_read_fw_mem(pdbg_init, dbg_buff, mem_type,
-                                      size, cudbg_err);
-               if (rc)
-                       goto err;
-       } else {
-               rc = CUDBG_STATUS_ENTITY_NOT_FOUND;
-               goto err;
-       }
-err:
-       return rc;
+       size = mem_info.avail[mc_idx].limit - mem_info.avail[mc_idx].base;
+       return cudbg_read_fw_mem(pdbg_init, dbg_buff, mem_type, size,
+                                cudbg_err);
 }
 
 int cudbg_collect_edc0_meminfo(struct cudbg_init *pdbg_init,
@@ -806,6 +819,22 @@ int cudbg_collect_edc1_meminfo(struct cudbg_init *pdbg_init,
                                        MEM_EDC1);
 }
 
+int cudbg_collect_mc0_meminfo(struct cudbg_init *pdbg_init,
+                             struct cudbg_buffer *dbg_buff,
+                             struct cudbg_error *cudbg_err)
+{
+       return cudbg_collect_mem_region(pdbg_init, dbg_buff, cudbg_err,
+                                       MEM_MC0);
+}
+
+int cudbg_collect_mc1_meminfo(struct cudbg_init *pdbg_init,
+                             struct cudbg_buffer *dbg_buff,
+                             struct cudbg_error *cudbg_err)
+{
+       return cudbg_collect_mem_region(pdbg_init, dbg_buff, cudbg_err,
+                                       MEM_MC1);
+}
+
 int cudbg_collect_rss(struct cudbg_init *pdbg_init,
                      struct cudbg_buffer *dbg_buff,
                      struct cudbg_error *cudbg_err)

diff --git a/drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.h b/drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.h
index eb4460c8583e281a14860b5d8e56a5dac5ba8c0b..8bd3d49e712ec636b21bf66ca939e6b20964fe4b 100644 (file)
--- a/drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.h
+++ b/drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.h
@@ -75,6 +75,12 @@ int cudbg_collect_edc0_meminfo(struct cudbg_init *pdbg_init,
 int cudbg_collect_edc1_meminfo(struct cudbg_init *pdbg_init,
                               struct cudbg_buffer *dbg_buff,
                               struct cudbg_error *cudbg_err);
+int cudbg_collect_mc0_meminfo(struct cudbg_init *pdbg_init,
+                             struct cudbg_buffer *dbg_buff,
+                             struct cudbg_error *cudbg_err);
+int cudbg_collect_mc1_meminfo(struct cudbg_init *pdbg_init,
+                             struct cudbg_buffer *dbg_buff,
+                             struct cudbg_error *cudbg_err);
 int cudbg_collect_rss(struct cudbg_init *pdbg_init,
                      struct cudbg_buffer *dbg_buff,
                      struct cudbg_error *cudbg_err);

diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c
index faa84a5f087868e4ef968eea922c5a362f9fe8fd..389458cb69a8f5b6412883b60cbecb4d2c523b85 100644 (file)
--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c
@@ -22,6 +22,8 @@
 static const struct cxgb4_collect_entity cxgb4_collect_mem_dump[] = {
        { CUDBG_EDC0, cudbg_collect_edc0_meminfo },
        { CUDBG_EDC1, cudbg_collect_edc1_meminfo },
+       { CUDBG_MC0, cudbg_collect_mc0_meminfo },
+       { CUDBG_MC1, cudbg_collect_mc1_meminfo },
 };
 
 static const struct cxgb4_collect_entity cxgb4_collect_hw_dump[] = {
@@ -158,6 +160,22 @@ static u32 cxgb4_get_entity_length(struct adapter *adap, u32 entity)
                }
                len = cudbg_mbytes_to_bytes(len);
                break;
+       case CUDBG_MC0:
+               value = t4_read_reg(adap, MA_TARGET_MEM_ENABLE_A);
+               if (value & EXT_MEM0_ENABLE_F) {
+                       value = t4_read_reg(adap, MA_EXT_MEMORY0_BAR_A);
+                       len = EXT_MEM0_SIZE_G(value);
+               }
+               len = cudbg_mbytes_to_bytes(len);
+               break;
+       case CUDBG_MC1:
+               value = t4_read_reg(adap, MA_TARGET_MEM_ENABLE_A);
+               if (value & EXT_MEM1_ENABLE_F) {
+                       value = t4_read_reg(adap, MA_EXT_MEMORY1_BAR_A);
+                       len = EXT_MEM1_SIZE_G(value);
+               }
+               len = cudbg_mbytes_to_bytes(len);
+               break;
        case CUDBG_RSS:
                len = RSS_NENTRIES * sizeof(u16);
                break;