There is no need of a specific MMU model for PowerPC 601.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3392 c046a42c-6fe2-441c-8c8c-71466251a162

diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index d39bd971a0fd13326be3114a8435b1d4d7f37384..c6fc16ecbfa2a5529d69d5f22721ad3aa95133aa 100644 (file)
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -88,8 +88,6 @@ enum {
     POWERPC_MMU_UNKNOWN    = 0,
     /* Standard 32 bits PowerPC MMU                            */
     POWERPC_MMU_32B,
-    /* PowerPC 601 MMU                                         */
-    POWERPC_MMU_601,
     /* PowerPC 6xx MMU with software TLB                       */
     POWERPC_MMU_SOFT_6xx,
     /* PowerPC 74xx MMU with software TLB                      */

diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index eeba478beebb14a33e17c9b72a0915f4bfe39fc1..12c8e71afabca08c7c25dde499f63f09b1a28fcb 100644 (file)
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -1280,7 +1280,6 @@ static int check_physical (CPUState *env, mmu_ctx_t *ctx,
     case POWERPC_MMU_32B:
     case POWERPC_MMU_SOFT_6xx:
     case POWERPC_MMU_SOFT_74xx:
-    case POWERPC_MMU_601:
     case POWERPC_MMU_SOFT_4xx:
     case POWERPC_MMU_REAL_4xx:
     case POWERPC_MMU_BOOKE:
@@ -1365,10 +1364,6 @@ int get_physical_address (CPUState *env, mmu_ctx_t *ctx, target_ulong eaddr,
             ret = mmu40x_get_physical_address(env, ctx, eaddr,
                                               rw, access_type);
             break;
-        case POWERPC_MMU_601:
-            /* XXX: TODO */
-            cpu_abort(env, "601 MMU model not implemented\n");
-            return -1;
         case POWERPC_MMU_BOOKE:
             ret = mmubooke_get_physical_address(env, ctx, eaddr,
                                                 rw, access_type);
@@ -1462,10 +1457,6 @@ int cpu_ppc_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
                     env->exception_index = POWERPC_EXCP_ISI;
                     env->error_code = 0x40000000;
                     break;
-                case POWERPC_MMU_601:
-                    /* XXX: TODO */
-                    cpu_abort(env, "MMU model not implemented\n");
-                    return -1;
                 case POWERPC_MMU_BOOKE:
                     /* XXX: TODO */
                     cpu_abort(env, "MMU model not implemented\n");
@@ -1562,10 +1553,6 @@ int cpu_ppc_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
                     else
                         env->spr[SPR_DSISR] = 0x40000000;
                     break;
-                case POWERPC_MMU_601:
-                    /* XXX: TODO */
-                    cpu_abort(env, "MMU model not implemented\n");
-                    return -1;
                 case POWERPC_MMU_BOOKE:
                     /* XXX: TODO */
                     cpu_abort(env, "MMU model not implemented\n");
@@ -1796,10 +1783,6 @@ void ppc_tlb_invalidate_all (CPUPPCState *env)
         /* XXX: TODO */
         cpu_abort(env, "MMU model not implemented\n");
         break;
-    case POWERPC_MMU_601:
-        /* XXX: TODO */
-        cpu_abort(env, "MMU model not implemented\n");
-        break;
     case POWERPC_MMU_32B:
 #if defined(TARGET_PPC64)
     case POWERPC_MMU_64B:
@@ -1839,10 +1822,6 @@ void ppc_tlb_invalidate_one (CPUPPCState *env, target_ulong addr)
         /* XXX: TODO */
         cpu_abort(env, "MMU model not implemented\n");
         break;
-    case POWERPC_MMU_601:
-        /* XXX: TODO */
-        cpu_abort(env, "MMU model not implemented\n");
-        break;
     case POWERPC_MMU_32B:
         /* tlbie invalidate TLBs for all segments */
         addr &= ~((target_ulong)-1 << 28);

diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 0210de8538cf920c752c9019927f3fc159602620..41a4c64100c1b29415c8f7ecc2ae4cb5f55d6b9a 100644 (file)
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -3196,7 +3196,7 @@ static void init_proc_e500 (CPUPPCState *env)
 #define POWERPC_INSNS_601    (POWERPC_INSNS_6xx | PPC_CACHE_DCBZ |            \
                               PPC_SEGMENT | PPC_EXTERN | PPC_POWER_BR)
 #define POWERPC_MSRM_601     (0x000000000000FD70ULL)
-//#define POWERPC_MMU_601      (POWERPC_MMU_601)
+#define POWERPC_MMU_601      (POWERPC_MMU_32B)
 //#define POWERPC_EXCP_601     (POWERPC_EXCP_601)
 #define POWERPC_INPUT_601    (PPC_FLAGS_INPUT_6xx)
 #define POWERPC_BFDM_601     (bfd_mach_ppc_601)
@@ -6232,9 +6232,6 @@ int cpu_ppc_register (CPUPPCState *env, ppc_def_t *def)
         case POWERPC_MMU_32B:
             mmu_model = "PowerPC 32";
             break;
-        case POWERPC_MMU_601:
-            mmu_model = "PowerPC 601";
-            break;
         case POWERPC_MMU_SOFT_6xx:
             mmu_model = "PowerPC 6xx/7xx with software driven TLBs";
             break;