dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>;
        };
 
-       pcie0_ep: pcie-ep@2900000 {
-               compatible = "ti,j721e-pcie-ep";
-               reg = <0x00 0x02900000 0x00 0x1000>,
-                     <0x00 0x02907000 0x00 0x400>,
-                     <0x00 0x0d000000 0x00 0x00800000>,
-                     <0x00 0x10000000 0x00 0x08000000>;
-               reg-names = "intd_cfg", "user_cfg", "reg", "mem";
-               interrupt-names = "link_state";
-               interrupts = <GIC_SPI 318 IRQ_TYPE_EDGE_RISING>;
-               ti,syscon-pcie-ctrl = <&scm_conf 0x4070>;
-               max-link-speed = <3>;
-               num-lanes = <2>;
-               power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>;
-               clocks = <&k3_clks 239 1>;
-               clock-names = "fck";
-               max-functions = /bits/ 8 <6>;
-               max-virtual-functions = /bits/ 8 <4 4 4 4 0 0>;
-               dma-coherent;
-       };
-
        pcie1_rc: pcie@2910000 {
                compatible = "ti,j721e-pcie-host";
                reg = <0x00 0x02910000 0x00 0x1000>,
                dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>;
        };
 
-       pcie1_ep: pcie-ep@2910000 {
-               compatible = "ti,j721e-pcie-ep";
-               reg = <0x00 0x02910000 0x00 0x1000>,
-                     <0x00 0x02917000 0x00 0x400>,
-                     <0x00 0x0d800000 0x00 0x00800000>,
-                     <0x00 0x18000000 0x00 0x08000000>;
-               reg-names = "intd_cfg", "user_cfg", "reg", "mem";
-               interrupt-names = "link_state";
-               interrupts = <GIC_SPI 330 IRQ_TYPE_EDGE_RISING>;
-               ti,syscon-pcie-ctrl = <&scm_conf 0x4074>;
-               max-link-speed = <3>;
-               num-lanes = <2>;
-               power-domains = <&k3_pds 240 TI_SCI_PD_EXCLUSIVE>;
-               clocks = <&k3_clks 240 1>;
-               clock-names = "fck";
-               max-functions = /bits/ 8 <6>;
-               max-virtual-functions = /bits/ 8 <4 4 4 4 0 0>;
-               dma-coherent;
-       };
-
        pcie2_rc: pcie@2920000 {
                compatible = "ti,j721e-pcie-host";
                reg = <0x00 0x02920000 0x00 0x1000>,
                dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>;
        };
 
-       pcie2_ep: pcie-ep@2920000 {
-               compatible = "ti,j721e-pcie-ep";
-               reg = <0x00 0x02920000 0x00 0x1000>,
-                     <0x00 0x02927000 0x00 0x400>,
-                     <0x00 0x0e000000 0x00 0x00800000>,
-                     <0x44 0x00000000 0x00 0x08000000>;
-               reg-names = "intd_cfg", "user_cfg", "reg", "mem";
-               interrupt-names = "link_state";
-               interrupts = <GIC_SPI 342 IRQ_TYPE_EDGE_RISING>;
-               ti,syscon-pcie-ctrl = <&scm_conf 0x4078>;
-               max-link-speed = <3>;
-               num-lanes = <2>;
-               power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>;
-               clocks = <&k3_clks 241 1>;
-               clock-names = "fck";
-               max-functions = /bits/ 8 <6>;
-               max-virtual-functions = /bits/ 8 <4 4 4 4 0 0>;
-               dma-coherent;
-       };
-
        pcie3_rc: pcie@2930000 {
                compatible = "ti,j721e-pcie-host";
                reg = <0x00 0x02930000 0x00 0x1000>,
                dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>;
        };
 
-       pcie3_ep: pcie-ep@2930000 {
-               compatible = "ti,j721e-pcie-ep";
-               reg = <0x00 0x02930000 0x00 0x1000>,
-                     <0x00 0x02937000 0x00 0x400>,
-                     <0x00 0x0e800000 0x00 0x00800000>,
-                     <0x44 0x10000000 0x00 0x08000000>;
-               reg-names = "intd_cfg", "user_cfg", "reg", "mem";
-               interrupt-names = "link_state";
-               interrupts = <GIC_SPI 354 IRQ_TYPE_EDGE_RISING>;
-               ti,syscon-pcie-ctrl = <&scm_conf 0x407c>;
-               max-link-speed = <3>;
-               num-lanes = <2>;
-               power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>;
-               clocks = <&k3_clks 242 1>;
-               clock-names = "fck";
-               max-functions = /bits/ 8 <6>;
-               max-virtual-functions = /bits/ 8 <4 4 4 4 0 0>;
-               dma-coherent;
-               #address-cells = <2>;
-               #size-cells = <2>;
-       };
-
        serdes_wiz4: wiz@5050000 {
                compatible = "ti,am64-wiz-10g";
                #address-cells = <1>;