RPM0 and RPM1 on the CN10KB SoC have 8 LMACs each, whereas RPM2
has only 4 LMACs. Similarly, the RPM0 and RPM1 have 256KB FIFO,
whereas RPM2 has 128KB FIFO. This patch fixes an issue with
improper TX credit programming for the RPM2 link.
Fixes: b9d0fedc6234 ("octeontx2-af: cn10kb: Add RPM_USX MAC support")
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Naveen Mamindlapalli <naveenm@marvell.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Link: https://lore.kernel.org/r/20240108073036.8766-1-naveenm@marvell.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
 
        rpm_t *rpm = rpmd;
        u8 num_lmacs;
        u32 fifo_len;
+       u16 max_lmac;
 
        lmac_info = rpm_read(rpm, 0, RPM2_CMRX_RX_LMACS);
        /* LMACs are divided into two groups and each group
         * Group0 lmac_id range {0..3}
         * Group1 lmac_id range {4..7}
         */
-       fifo_len = rpm->mac_ops->fifo_len / 2;
+       max_lmac = (rpm_read(rpm, 0, CGX_CONST) >> 24) & 0xFF;
+       if (max_lmac > 4)
+               fifo_len = rpm->mac_ops->fifo_len / 2;
+       else
+               fifo_len = rpm->mac_ops->fifo_len;
 
        if (lmac_id < 4) {
                num_lmacs = hweight8(lmac_info & 0xF);