ARM: dts: imx6q{dl}: add a DTE uart pinctrl for uart2

In the arm2 board, the UART2 works in the dte mode.
So add a pinctrl for both the imx6q{dl} boards.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
index 4505109de7d623b5f3736937ce2881cbc8c1098a..d75e32c93f080d16463eb50c99efedec4b54db73 100644 (file)
--- a/arch/arm/boot/dts/imx6dl.dtsi
+++ b/arch/arm/boot/dts/imx6dl.dtsi
@@ -230,6 +230,15 @@
                                                        MX6DL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
                                                >;
                                        };
+
+                                       pinctrl_uart2_2: uart2grp-2 { /* DTE mode */
+                                               fsl,pins = <
+                                                       MX6DL_PAD_EIM_D26__UART2_RX_DATA   0x1b0b1
+                                                       MX6DL_PAD_EIM_D27__UART2_TX_DATA   0x1b0b1
+                                                       MX6DL_PAD_EIM_D28__UART2_DTE_CTS_B 0x1b0b1
+                                                       MX6DL_PAD_EIM_D29__UART2_DTE_RTS_B 0x1b0b1
+                                               >;
+                                       };
                                };
 
                                uart4 {

diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 6f4d6ab9c255829c607beb76e978684edfd0cd08..e0b7bad7f78f3447e5e426168f9f2803de020aad 100644 (file)
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -266,6 +266,15 @@
                                                        MX6Q_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
                                                >;
                                        };
+
+                                       pinctrl_uart2_2: uart2grp-2 { /* DTE mode */
+                                               fsl,pins = <
+                                                       MX6Q_PAD_EIM_D26__UART2_RX_DATA   0x1b0b1
+                                                       MX6Q_PAD_EIM_D27__UART2_TX_DATA   0x1b0b1
+                                                       MX6Q_PAD_EIM_D28__UART2_DTE_CTS_B 0x1b0b1
+                                                       MX6Q_PAD_EIM_D29__UART2_DTE_RTS_B 0x1b0b1
+                                               >;
+                                       };
                                };
 
                                uart4 {