net/mlx5: Add mlx5_ifc bits for modify header argument

Add enum value for modify-header argument object and mlx5_bits
for the related capabilities.

Signed-off-by: Muhammad Sammar <muhammads@nvidia.com>
Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Reviewed-by: Alex Vesker <valex@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>

diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 02c628f4fe2679eaa13eb64a157b9893adc00ed7..6c84bf6eec85cdc98d1ebf28450a8660695c85f7 100644 (file)
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -78,12 +78,15 @@ enum {
 
 enum {
        MLX5_OBJ_TYPE_SW_ICM = 0x0008,
+       MLX5_OBJ_TYPE_HEADER_MODIFY_ARGUMENT  = 0x23,
 };
 
 enum {
        MLX5_GENERAL_OBJ_TYPES_CAP_SW_ICM = (1ULL << MLX5_OBJ_TYPE_SW_ICM),
        MLX5_GENERAL_OBJ_TYPES_CAP_GENEVE_TLV_OPT = (1ULL << 11),
        MLX5_GENERAL_OBJ_TYPES_CAP_VIRTIO_NET_Q = (1ULL << 13),
+       MLX5_GENERAL_OBJ_TYPES_CAP_HEADER_MODIFY_ARGUMENT =
+               (1ULL << MLX5_OBJ_TYPE_HEADER_MODIFY_ARGUMENT),
        MLX5_GENERAL_OBJ_TYPES_CAP_MACSEC_OFFLOAD = (1ULL << 39),
 };
 
@@ -321,6 +324,10 @@ enum {
        MLX5_FT_NIC_TX_RDMA_2_NIC_TX = BIT(1),
 };
 
+enum {
+       MLX5_CMD_OP_MOD_UPDATE_HEADER_MODIFY_ARGUMENT = 0x1,
+};
+
 struct mlx5_ifc_flow_table_fields_supported_bits {
        u8         outer_dmac[0x1];
        u8         outer_smac[0x1];
@@ -1927,7 +1934,14 @@ struct mlx5_ifc_cmd_hca_cap_bits {
        u8         reserved_at_750[0x4];
        u8         max_dynamic_vf_msix_table_size[0xc];
 
-       u8         reserved_at_760[0x20];
+       u8         reserved_at_760[0x3];
+       u8         log_max_num_header_modify_argument[0x5];
+       u8         reserved_at_768[0x4];
+       u8         log_header_modify_argument_granularity[0x4];
+       u8         reserved_at_770[0x3];
+       u8         log_header_modify_argument_max_alloc[0x5];
+       u8         reserved_at_778[0x8];
+
        u8         vhca_tunnel_commands[0x40];
        u8         match_definer_format_supported[0x40];
 };
@@ -6361,6 +6375,18 @@ struct mlx5_ifc_general_obj_out_cmd_hdr_bits {
        u8         reserved_at_60[0x20];
 };
 
+struct mlx5_ifc_modify_header_arg_bits {
+       u8         reserved_at_0[0x80];
+
+       u8         reserved_at_80[0x8];
+       u8         access_pd[0x18];
+};
+
+struct mlx5_ifc_create_modify_header_arg_in_bits {
+       struct mlx5_ifc_general_obj_in_cmd_hdr_bits hdr;
+       struct mlx5_ifc_modify_header_arg_bits arg;
+};
+
 struct mlx5_ifc_create_match_definer_in_bits {
        struct mlx5_ifc_general_obj_in_cmd_hdr_bits general_obj_in_cmd_hdr;