arm64: dts: qcom: x1e78100-qcp: Enable Type-A USB ports labeled 3 and 4/6

The X Elite QCP board has 3 USB-A ports. The ones labed as USB3 and
USB4/6 are both connected to the multiport controller, each one via a
separate NXP PTN3222 eUSB2-to-USB2 redriver to the eUSB2 PHY for
High-Speed support, with a dedicated QMP PHY for SuperSpeed support.

Describe these two redrivers and enable each pair of PHYs along with the
USB controller, all in order to enable support for these 2 USB-A ports.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20241202-x1e80100-qcp-t14-enable-usb-type-a-ports-v2-2-7360ed65c769@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
index d60250e007c78ec700341118ed5f8fc5bef72dda..6b380245ab6bfe64a949c970ffc69a19f5a9f45f 100644 (file)
--- a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
+++ b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
@@ -616,6 +616,40 @@
        };
 };
 
+&i2c5 {
+       clock-frequency = <400000>;
+
+       status = "okay";
+
+       eusb3_repeater: redriver@47 {
+               compatible = "nxp,ptn3222";
+               reg = <0x47>;
+               #phy-cells = <0>;
+
+               vdd3v3-supply = <&vreg_l13b_3p0>;
+               vdd1v8-supply = <&vreg_l4b_1p8>;
+
+               reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>;
+
+               pinctrl-0 = <&eusb3_reset_n>;
+               pinctrl-names = "default";
+       };
+
+       eusb6_repeater: redriver@4f {
+               compatible = "nxp,ptn3222";
+               reg = <0x4f>;
+               #phy-cells = <0>;
+
+               vdd3v3-supply = <&vreg_l13b_3p0>;
+               vdd1v8-supply = <&vreg_l4b_1p8>;
+
+               reset-gpios = <&tlmm 184 GPIO_ACTIVE_LOW>;
+
+               pinctrl-0 = <&eusb6_reset_n>;
+               pinctrl-names = "default";
+       };
+};
+
 &lpass_tlmm {
        spkr_01_sd_n_active: spkr-01-sd-n-active-state {
                pins = "gpio12";
@@ -840,6 +874,22 @@
                bias-disable;
        };
 
+       eusb3_reset_n: eusb3-reset-n-state {
+               pins = "gpio6";
+               function = "gpio";
+               drive-strength = <2>;
+               bias-disable;
+               output-low;
+       };
+
+       eusb6_reset_n: eusb6-reset-n-state {
+               pins = "gpio184";
+               function = "gpio";
+               drive-strength = <2>;
+               bias-disable;
+               output-low;
+       };
+
        nvme_reg_en: nvme-reg-en-state {
                pins = "gpio18";
                function = "gpio";
@@ -1009,3 +1059,39 @@
 &usb_1_ss2_qmpphy_out {
        remote-endpoint = <&pmic_glink_ss2_ss_in>;
 };
+
+&usb_mp {
+       status = "okay";
+};
+
+&usb_mp_hsphy0 {
+       vdd-supply = <&vreg_l2e_0p8>;
+       vdda12-supply = <&vreg_l3e_1p2>;
+
+       phys = <&eusb6_repeater>;
+
+       status = "okay";
+};
+
+&usb_mp_hsphy1 {
+       vdd-supply = <&vreg_l2e_0p8>;
+       vdda12-supply = <&vreg_l3e_1p2>;
+
+       phys = <&eusb3_repeater>;
+
+       status = "okay";
+};
+
+&usb_mp_qmpphy0 {
+       vdda-phy-supply = <&vreg_l3e_1p2>;
+       vdda-pll-supply = <&vreg_l3c_0p8>;
+
+       status = "okay";
+};
+
+&usb_mp_qmpphy1 {
+       vdda-phy-supply = <&vreg_l3e_1p2>;
+       vdda-pll-supply = <&vreg_l3c_0p8>;
+
+       status = "okay";
+};