gpio: adp5585: add support for the adp5589 expander

Support the adp5589 I/O expander which supports up to 19 pins. We need
to add a chip_info based struct since accessing register "banks"
and "bits" differs between devices.

Also some register addresses are different.

While at it move ADP558X_GPIO_MAX defines to the main header file and
rename them. That information will be needed by the top level device in
a following change.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Signed-off-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20250701-dev-adp5589-fw-v7-9-b1fcfe9e9826@analog.com
Signed-off-by: Lee Jones <lee@kernel.org>

diff --git a/drivers/gpio/gpio-adp5585.c b/drivers/gpio/gpio-adp5585.c
index d5c0f1b267c82a5002b50cbb7a108166439e4785..cdf107742579cb44d73cc030646358ba5a23fd97 100644 (file)
--- a/drivers/gpio/gpio-adp5585.c
+++ b/drivers/gpio/gpio-adp5585.c
@@ -4,6 +4,7 @@
  *
  * Copyright 2022 NXP
  * Copyright 2024 Ideas on Board Oy
+ * Copyright 2025 Analog Devices, Inc.
  */
 
 #include <linux/device.h>
@@ -14,57 +15,106 @@
 #include <linux/regmap.h>
 #include <linux/types.h>
 
-#define ADP5585_GPIO_MAX       11
+/*
+ * Bank 0 covers pins "GPIO 1/R0" to "GPIO 6/R5", numbered 0 to 5 by the
+ * driver, and bank 1 covers pins "GPIO 7/C0" to "GPIO 11/C4", numbered 6 to
+ * 10. Some variants of the ADP5585 don't support "GPIO 6/R5". As the driver
+ * uses identical GPIO numbering for all variants to avoid confusion, GPIO 5 is
+ * marked as reserved in the device tree for variants that don't support it.
+ */
+#define ADP5585_BANK(n)                        ((n) >= 6 ? 1 : 0)
+#define ADP5585_BIT(n)                 ((n) >= 6 ? BIT((n) - 6) : BIT(n))
+
+/*
+ * Bank 0 covers pins "GPIO 1/R0" to "GPIO 8/R7", numbered 0 to 7 by the
+ * driver, bank 1 covers pins "GPIO 9/C0" to "GPIO 16/C7", numbered 8 to
+ * 15 and bank 3 covers pins "GPIO 17/C8" to "GPIO 19/C10", numbered 16 to 18.
+ */
+#define ADP5589_BANK(n)                        ((n) >> 3)
+#define ADP5589_BIT(n)                 BIT((n) & 0x7)
+
+struct adp5585_gpio_chip {
+       int (*bank)(unsigned int off);
+       int (*bit)(unsigned int off);
+       unsigned int max_gpio;
+       unsigned int debounce_dis_a;
+       unsigned int rpull_cfg_a;
+       unsigned int gpo_data_a;
+       unsigned int gpo_out_a;
+       unsigned int gpio_dir_a;
+       unsigned int gpi_stat_a;
+       bool has_bias_hole;
+};
 
 struct adp5585_gpio_dev {
        struct gpio_chip gpio_chip;
+       const struct adp5585_gpio_chip *info;
        struct regmap *regmap;
 };
 
+static int adp5585_gpio_bank(unsigned int off)
+{
+       return ADP5585_BANK(off);
+}
+
+static int adp5585_gpio_bit(unsigned int off)
+{
+       return ADP5585_BIT(off);
+}
+
+static int adp5589_gpio_bank(unsigned int off)
+{
+       return ADP5589_BANK(off);
+}
+
+static int adp5589_gpio_bit(unsigned int off)
+{
+       return ADP5589_BIT(off);
+}
+
 static int adp5585_gpio_get_direction(struct gpio_chip *chip, unsigned int off)
 {
        struct adp5585_gpio_dev *adp5585_gpio = gpiochip_get_data(chip);
-       unsigned int bank = ADP5585_BANK(off);
-       unsigned int bit = ADP5585_BIT(off);
+       const struct adp5585_gpio_chip *info = adp5585_gpio->info;
        unsigned int val;
 
-       regmap_read(adp5585_gpio->regmap, ADP5585_GPIO_DIRECTION_A + bank, &val);
+       regmap_read(adp5585_gpio->regmap, info->gpio_dir_a + info->bank(off), &val);
 
-       return val & bit ? GPIO_LINE_DIRECTION_OUT : GPIO_LINE_DIRECTION_IN;
+       return val & info->bit(off) ? GPIO_LINE_DIRECTION_OUT : GPIO_LINE_DIRECTION_IN;
 }
 
 static int adp5585_gpio_direction_input(struct gpio_chip *chip, unsigned int off)
 {
        struct adp5585_gpio_dev *adp5585_gpio = gpiochip_get_data(chip);
-       unsigned int bank = ADP5585_BANK(off);
-       unsigned int bit = ADP5585_BIT(off);
+       const struct adp5585_gpio_chip *info = adp5585_gpio->info;
 
-       return regmap_clear_bits(adp5585_gpio->regmap,
-                                ADP5585_GPIO_DIRECTION_A + bank, bit);
+       return regmap_clear_bits(adp5585_gpio->regmap, info->gpio_dir_a + info->bank(off),
+                                info->bit(off));
 }
 
 static int adp5585_gpio_direction_output(struct gpio_chip *chip, unsigned int off, int val)
 {
        struct adp5585_gpio_dev *adp5585_gpio = gpiochip_get_data(chip);
-       unsigned int bank = ADP5585_BANK(off);
-       unsigned int bit = ADP5585_BIT(off);
+       const struct adp5585_gpio_chip *info = adp5585_gpio->info;
+       unsigned int bank = info->bank(off);
+       unsigned int bit = info->bit(off);
        int ret;
 
-       ret = regmap_update_bits(adp5585_gpio->regmap,
-                                ADP5585_GPO_DATA_OUT_A + bank, bit,
-                                val ? bit : 0);
+       ret = regmap_update_bits(adp5585_gpio->regmap, info->gpo_data_a + bank,
+                                bit, val ? bit : 0);
        if (ret)
                return ret;
 
-       return regmap_set_bits(adp5585_gpio->regmap,
-                              ADP5585_GPIO_DIRECTION_A + bank, bit);
+       return regmap_set_bits(adp5585_gpio->regmap, info->gpio_dir_a + bank,
+                              bit);
 }
 
 static int adp5585_gpio_get_value(struct gpio_chip *chip, unsigned int off)
 {
        struct adp5585_gpio_dev *adp5585_gpio = gpiochip_get_data(chip);
-       unsigned int bank = ADP5585_BANK(off);
-       unsigned int bit = ADP5585_BIT(off);
+       const struct adp5585_gpio_chip *info = adp5585_gpio->info;
+       unsigned int bank = info->bank(off);
+       unsigned int bit = info->bit(off);
        unsigned int reg;
        unsigned int val;
 
@@ -79,8 +129,8 @@ static int adp5585_gpio_get_value(struct gpio_chip *chip, unsigned int off)
         * .direction_input(), .direction_output() or .set() operations racing
         * with this.
         */
-       regmap_read(adp5585_gpio->regmap, ADP5585_GPIO_DIRECTION_A + bank, &val);
-       reg = val & bit ? ADP5585_GPO_DATA_OUT_A : ADP5585_GPI_STATUS_A;
+       regmap_read(adp5585_gpio->regmap, info->gpio_dir_a + bank, &val);
+       reg = val & bit ? info->gpo_data_a : info->gpi_stat_a;
        regmap_read(adp5585_gpio->regmap, reg + bank, &val);
 
        return !!(val & bit);
@@ -90,17 +140,17 @@ static int adp5585_gpio_set_value(struct gpio_chip *chip, unsigned int off,
                                  int val)
 {
        struct adp5585_gpio_dev *adp5585_gpio = gpiochip_get_data(chip);
-       unsigned int bank = ADP5585_BANK(off);
-       unsigned int bit = ADP5585_BIT(off);
+       const struct adp5585_gpio_chip *info = adp5585_gpio->info;
+       unsigned int bit = adp5585_gpio->info->bit(off);
 
-       return regmap_update_bits(adp5585_gpio->regmap,
-                                 ADP5585_GPO_DATA_OUT_A + bank,
+       return regmap_update_bits(adp5585_gpio->regmap, info->gpo_data_a + info->bank(off),
                                  bit, val ? bit : 0);
 }
 
 static int adp5585_gpio_set_bias(struct adp5585_gpio_dev *adp5585_gpio,
                                 unsigned int off, unsigned int bias)
 {
+       const struct adp5585_gpio_chip *info = adp5585_gpio->info;
        unsigned int bit, reg, mask, val;
 
        /*
@@ -108,8 +158,10 @@ static int adp5585_gpio_set_bias(struct adp5585_gpio_dev *adp5585_gpio,
         * consecutive registers ADP5585_RPULL_CONFIG_*, with a hole of 4 bits
         * after R5.
         */
-       bit = off * 2 + (off > 5 ? 4 : 0);
-       reg = ADP5585_RPULL_CONFIG_A + bit / 8;
+       bit = off * 2;
+       if (info->has_bias_hole)
+               bit += (off > 5 ? 4 : 0);
+       reg = info->rpull_cfg_a + bit / 8;
        mask = ADP5585_Rx_PULL_CFG_MASK << (bit % 8);
        val = bias << (bit % 8);
 
@@ -119,22 +171,22 @@ static int adp5585_gpio_set_bias(struct adp5585_gpio_dev *adp5585_gpio,
 static int adp5585_gpio_set_drive(struct adp5585_gpio_dev *adp5585_gpio,
                                  unsigned int off, enum pin_config_param drive)
 {
-       unsigned int bank = ADP5585_BANK(off);
-       unsigned int bit = ADP5585_BIT(off);
+       const struct adp5585_gpio_chip *info = adp5585_gpio->info;
+       unsigned int bit = adp5585_gpio->info->bit(off);
 
        return regmap_update_bits(adp5585_gpio->regmap,
-                                 ADP5585_GPO_OUT_MODE_A + bank, bit,
+                                 info->gpo_out_a + info->bank(off), bit,
                                  drive == PIN_CONFIG_DRIVE_OPEN_DRAIN ? bit : 0);
 }
 
 static int adp5585_gpio_set_debounce(struct adp5585_gpio_dev *adp5585_gpio,
                                     unsigned int off, unsigned int debounce)
 {
-       unsigned int bank = ADP5585_BANK(off);
-       unsigned int bit = ADP5585_BIT(off);
+       const struct adp5585_gpio_chip *info = adp5585_gpio->info;
+       unsigned int bit = adp5585_gpio->info->bit(off);
 
        return regmap_update_bits(adp5585_gpio->regmap,
-                                 ADP5585_DEBOUNCE_DIS_A + bank, bit,
+                                 info->debounce_dis_a + info->bank(off), bit,
                                  debounce ? 0 : bit);
 }
 
@@ -175,6 +227,7 @@ static int adp5585_gpio_set_config(struct gpio_chip *chip, unsigned int off,
 static int adp5585_gpio_probe(struct platform_device *pdev)
 {
        struct adp5585_dev *adp5585 = dev_get_drvdata(pdev->dev.parent);
+       const struct platform_device_id *id = platform_get_device_id(pdev);
        struct adp5585_gpio_dev *adp5585_gpio;
        struct device *dev = &pdev->dev;
        struct gpio_chip *gc;
@@ -186,6 +239,10 @@ static int adp5585_gpio_probe(struct platform_device *pdev)
 
        adp5585_gpio->regmap = adp5585->regmap;
 
+       adp5585_gpio->info = (const struct adp5585_gpio_chip *)id->driver_data;
+       if (!adp5585_gpio->info)
+               return -ENODEV;
+
        device_set_of_node_from_dev(dev, dev->parent);
 
        gc = &adp5585_gpio->gpio_chip;
@@ -199,7 +256,7 @@ static int adp5585_gpio_probe(struct platform_device *pdev)
        gc->can_sleep = true;
 
        gc->base = -1;
-       gc->ngpio = ADP5585_GPIO_MAX;
+       gc->ngpio = adp5585_gpio->info->max_gpio;
        gc->label = pdev->name;
        gc->owner = THIS_MODULE;
 
@@ -211,8 +268,34 @@ static int adp5585_gpio_probe(struct platform_device *pdev)
        return 0;
 }
 
+static const struct adp5585_gpio_chip adp5585_gpio_chip_info = {
+       .bank = adp5585_gpio_bank,
+       .bit = adp5585_gpio_bit,
+       .debounce_dis_a = ADP5585_DEBOUNCE_DIS_A,
+       .rpull_cfg_a = ADP5585_RPULL_CONFIG_A,
+       .gpo_data_a = ADP5585_GPO_DATA_OUT_A,
+       .gpo_out_a = ADP5585_GPO_OUT_MODE_A,
+       .gpio_dir_a = ADP5585_GPIO_DIRECTION_A,
+       .gpi_stat_a = ADP5585_GPI_STATUS_A,
+       .max_gpio = ADP5585_PIN_MAX,
+       .has_bias_hole = true,
+};
+
+static const struct adp5585_gpio_chip adp5589_gpio_chip_info = {
+       .bank = adp5589_gpio_bank,
+       .bit = adp5589_gpio_bit,
+       .debounce_dis_a = ADP5589_DEBOUNCE_DIS_A,
+       .rpull_cfg_a = ADP5589_RPULL_CONFIG_A,
+       .gpo_data_a = ADP5589_GPO_DATA_OUT_A,
+       .gpo_out_a = ADP5589_GPO_OUT_MODE_A,
+       .gpio_dir_a = ADP5589_GPIO_DIRECTION_A,
+       .gpi_stat_a = ADP5589_GPI_STATUS_A,
+       .max_gpio = ADP5589_PIN_MAX,
+};
+
 static const struct platform_device_id adp5585_gpio_id_table[] = {
-       { "adp5585-gpio" },
+       { "adp5585-gpio", (kernel_ulong_t)&adp5585_gpio_chip_info },
+       { "adp5589-gpio", (kernel_ulong_t)&adp5589_gpio_chip_info },
        { /* Sentinel */ }
 };
 MODULE_DEVICE_TABLE(platform, adp5585_gpio_id_table);

diff --git a/include/linux/mfd/adp5585.h b/include/linux/mfd/adp5585.h
index 6ecb90a6276c0f8f2c983c62c7268505d74b6583..d26f722cf31af5416eefecab5e542e66b01321f6 100644 (file)
--- a/include/linux/mfd/adp5585.h
+++ b/include/linux/mfd/adp5585.h
@@ -107,23 +107,23 @@
 
 #define ADP5585_MAX_REG                        ADP5585_INT_EN
 
-/*
- * Bank 0 covers pins "GPIO 1/R0" to "GPIO 6/R5", numbered 0 to 5 by the
- * driver, and bank 1 covers pins "GPIO 7/C0" to "GPIO 11/C4", numbered 6 to
- * 10. Some variants of the ADP5585 don't support "GPIO 6/R5". As the driver
- * uses identical GPIO numbering for all variants to avoid confusion, GPIO 5 is
- * marked as reserved in the device tree for variants that don't support it.
- */
-#define ADP5585_BANK(n)                        ((n) >= 6 ? 1 : 0)
-#define ADP5585_BIT(n)                 ((n) >= 6 ? BIT((n) - 6) : BIT(n))
+#define ADP5585_PIN_MAX                        11
 
 /* ADP5589 */
 #define                ADP5589_MAN_ID_VALUE            0x10
+#define ADP5589_GPI_STATUS_A           0x16
 #define ADP5589_GPI_STATUS_C           0x18
+#define ADP5589_RPULL_CONFIG_A         0x19
+#define ADP5589_DEBOUNCE_DIS_A         0x27
+#define ADP5589_GPO_DATA_OUT_A         0x2a
+#define ADP5589_GPO_OUT_MODE_A         0x2d
+#define                ADP5589_GPIO_DIRECTION_A        0x30
 #define ADP5589_PIN_CONFIG_D           0x4C
 #define ADP5589_INT_EN                 0x4e
 #define ADP5589_MAX_REG                        ADP5589_INT_EN
 
+#define ADP5589_PIN_MAX                        19
+
 struct regmap;
 
 enum adp5585_variant {