Whitespace cleanups

No functional changes here, just whitespacing cleanups.

Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>

diff --git a/bitfield.h b/bitfield.h
index 5fafe88f967dfecba04fcc397e00360a44098b09..05392d4126132c9902127e913eb2f27ece20fc29 100644 (file)
--- a/bitfield.h
+++ b/bitfield.h
@@ -25,7 +25,7 @@ struct field {
        unsigned stringlen;
 };
 
-struct numfield { 
+struct numfield {
        unsigned start, end;
        char *name;
        char *fmt;

diff --git a/mce-amd-k8.c b/mce-amd-k8.c
index 6edb9cec1dd588ea93b3c58fd8f66ef68bec5c5e..4ba28f251fc70babaa53fc642224c18b456b8fca 100644 (file)
--- a/mce-amd-k8.c
+++ b/mce-amd-k8.c
@@ -49,7 +49,7 @@ static char *k8threshold[] = {
        [K8_MCELOG_THRESHOLD_FBDIMM] = "MC4_MISC3 FBDIMM threshold",
        [K8_MCELOG_THRESHOLD_FBDIMM + 1 ...
         K8_MCE_THRESHOLD_TOP - K8_MCE_THRESHOLD_BASE - 1] =
-                "Unknown threshold counter",
+               "Unknown threshold counter",
 };
 
 static char *transaction[] = {
@@ -163,7 +163,7 @@ static void decode_k8_dc_mc(struct mce_event *e)
        if (e->status & (3ULL << 45)) {
                mce_snprintf(e->error_msg,
                             "Data cache ECC error (syndrome %x)",
-                             (uint32_t) (e->status >> 47) & 0xff);
+                             (uint32_t) (e->status >> 47) & 0xff);
                if (e->status & (1ULL << 40))
                        mce_snprintf(e->error_msg, "found by scrubber");
        }

diff --git a/mce-intel-dunnington.c b/mce-intel-dunnington.c
index dd29ddd3cc9ce501bba7966869473bbfa40747f2..4b1c7e3467c2c819f68a44c326ff151eb1090bda 100644 (file)
--- a/mce-intel-dunnington.c
+++ b/mce-intel-dunnington.c
@@ -55,7 +55,7 @@ static char *dnt_int_error[0xf] = {
        [0x2] = "Internal timeout error",
        [0x3] = "Internal timeout error",
        [0x4] = "Intel Cache Safe Technology Queue full error\n"
-               "or disabled ways in a set overflow",
+               "or disabled ways in a set overflow",
        [0x5] = "Quiet cycle timeout error (correctable)",
 };
 

diff --git a/mce-intel-ivb.c b/mce-intel-ivb.c
index 9485560f0ea134df2ddaf5aea8ddb0dfa279f85a..fe08833f34aeb74e1a76dff0ce72bfcf6edc6d4e 100644 (file)
--- a/mce-intel-ivb.c
+++ b/mce-intel-ivb.c
@@ -38,7 +38,7 @@ static char *pcu_1[] = {
        [9] = "D_Parity_Error"
 };
 
-static char *pcu_2[] = { 
+static char *pcu_2[] = {
        [0x00] = "No Error",
        [0x0D] = "MC_IMC_FORCE_SR_S3_TIMEOUT",
        [0x0E] = "MC_MC_CPD_UNCPD_ST_TIMEOUT",
@@ -60,7 +60,7 @@ static char *pcu_2[] = {
        [0x81] = "MC_RECOVERABLE_DIE_THERMAL_TOO_HOT",
 };
 
-static struct field pcu_mc4[] = { 
+static struct field pcu_mc4[] = {
        FIELD(16, pcu_1),
        FIELD(24, pcu_2),
        {}

diff --git a/mce-intel-sb.c b/mce-intel-sb.c
index 938b2aa1825d04aec289d8de1c905a821afafc2f..687fc7262dadeb0c42b568af9f2496d3946029ae 100644 (file)
--- a/mce-intel-sb.c
+++ b/mce-intel-sb.c
@@ -38,7 +38,7 @@ static char *pcu_1[] = {
        [9] = "D_Parity_Error"
 };
 
-static char *pcu_2[] = { 
+static char *pcu_2[] = {
        [0x00] = "No Error",
        [0x0D] = "MC_IMC_FORCE_SR_S3_TIMEOUT",
        [0x0E] = "MC_MC_CPD_UNCPD_ST_TIMEOUT",
@@ -57,7 +57,7 @@ static char *pcu_2[] = {
        [0x81] = "MC_RECOVERABLE_DIE_THERMAL_TOO_HOT",
 };
 
-static struct field pcu_mc4[] = { 
+static struct field pcu_mc4[] = {
        FIELD(16, pcu_1),
        FIELD(24, pcu_2),
        {}

diff --git a/mce-intel-tulsa.c b/mce-intel-tulsa.c
index 85423a6b8e94a9653cf7df2eb8b59ca833096111..f53f3adf1817b41defcadbdb77e229c885781a5f 100644 (file)
--- a/mce-intel-tulsa.c
+++ b/mce-intel-tulsa.c
@@ -25,13 +25,13 @@
 
 /* See IA32 SDM Vol3B Appendix E.4.1 ff */
 
-static struct numfield corr_numbers[] = { 
+static struct numfield corr_numbers[] = {
        NUMBER(32, 39, "Corrected events"),
        {}
 };
 
-static struct numfield ecc_numbers[] = { 
-       HEXNUMBER(44, 51, "ECC syndrome"),      
+static struct numfield ecc_numbers[] = {
+       HEXNUMBER(44, 51, "ECC syndrome"),
        {},
 };
 
@@ -70,7 +70,7 @@ static char *tls_int_error[0xf] = {
        [0x2] = "Internal timeout error",
        [0x3] = "Internal timeout error",
        [0x4] = "Intel Cache Safe Technology Queue full error\n"
-               "or disabled ways in a set overflow",
+               "or disabled ways in a set overflow",
 };
 
 struct field tls_int_status[] = {

diff --git a/ras-events.c b/ras-events.c
index d1e907d3a7d01c667ee66a4f32dce74385c3d3b7..67df8858f9cb2b795bd84eff2ea8ad9e9a3be6ab 100644 (file)
--- a/ras-events.c
+++ b/ras-events.c
@@ -344,8 +344,8 @@ static void *handle_ras_events_cpu(void *priv)
        }
 
        printf("Listening to events on cpu %d\n", pdata->cpu);
-        if (pdata->ras->record_events)
-                ras_mc_event_opendb(pdata->cpu, pdata->ras);
+       if (pdata->ras->record_events)
+               ras_mc_event_opendb(pdata->cpu, pdata->ras);
 
        read_ras_event(fd, pdata, kbuf, page);
 
@@ -480,7 +480,7 @@ int handle_ras_events(int record_events)
 
        ras->pevent = pevent;
        ras->page_size = page_size;
-        ras->record_events = record_events;
+       ras->record_events = record_events;
 
        /* Registers the special event handlers */
        pevent_register_event_handler(pevent, -1, "ras", "mc_event",

diff --git a/ras-events.h b/ras-events.h
index 027d97336ef543aedddc556da2b692003d429af1..0ac9ee15b2f5d98225009bd23c05541cb2890d80 100644 (file)
--- a/ras-events.h
+++ b/ras-events.h
@@ -37,9 +37,9 @@ struct ras_events {
 
        /* Booleans */
        unsigned        use_uptime: 1;
-        unsigned        record_events: 1;
+       unsigned        record_events: 1;
 
-        /* For timestamp */
+       /* For timestamp */
        time_t          uptime_diff;
 
        /* For ras-record */

diff --git a/ras-mce-handler.c b/ras-mce-handler.c
index ff9931cac1657b7ead0f7ef641698823a51d9a8a..c1e88a654b39a835c4cd754e780e476414be585b 100644 (file)
--- a/ras-mce-handler.c
+++ b/ras-mce-handler.c
@@ -94,7 +94,7 @@ enum cputype select_intel_cputype(struct ras_events *ras)
        }
        log(ALL, LOG_INFO,
            "Unknown Intel CPU type Family %x Model %x\n",
-            mce->family, mce->model);
+           mce->family, mce->model);
        return mce->family == 6 ? CPU_P6OLD : CPU_GENERIC;
 }
 

diff --git a/ras-record.c b/ras-record.c
index 6a21619ee64a40427e4148603402e44087521f3a..d79bdc9343c90383085a555cce18b5907d0b2fc8 100644 (file)
--- a/ras-record.c
+++ b/ras-record.c
@@ -104,7 +104,7 @@ int ras_mc_event_opendb(unsigned cpu, struct ras_events *ras)
        char sql[1024];
        struct sqlite3_priv *priv;
 
-        printf("Calling %s()\n", __FUNCTION__);
+       printf("Calling %s()\n", __FUNCTION__);
 
        ras->db_priv = NULL;
 
@@ -130,7 +130,7 @@ int ras_mc_event_opendb(unsigned cpu, struct ras_events *ras)
                        usleep(10000);
        } while (rc == SQLITE_BUSY);
 
-        if (rc != SQLITE_OK) {
+       if (rc != SQLITE_OK) {
                log(TERM, LOG_ERR,
                    "cpu %u: Failed to connect to %s: error = %d\n",
                    cpu, SQLITE_RAS_DB, rc);