net: hns3: add support for EQE/CQE mode configuration

For device whose version is above V3(include V3), the GL can
select EQE or CQE mode, so adds support for it.

In CQE mode, the coalesced timer will restart when the first new
completion occurs, while in EQE mode, the timer will not restart.

Signed-off-by: Yufeng Mo <moyufeng@huawei.com>
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
index 848bed86619363dfbd1a1f093afb7b8c803e3f22..1d51fae4930761ecdc4821e4144bf03ebfe5bf21 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
@@ -774,6 +774,7 @@ struct hnae3_knic_private_info {
 
        u16 int_rl_setting;
        enum pkt_hash_types rss_type;
+       void __iomem *io_base;
 };
 
 struct hnae3_roce_private_info {

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
index fcbeb1fbe5b82ee40c0e775204a2f92a8d0032a9..1bd83d742ea7274ff52d48a4ddab827a09b099ec 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
@@ -4473,9 +4473,7 @@ static void hns3_tx_dim_work(struct work_struct *work)
 static void hns3_nic_init_dim(struct hns3_enet_tqp_vector *tqp_vector)
 {
        INIT_WORK(&tqp_vector->rx_group.dim.work, hns3_rx_dim_work);
-       tqp_vector->rx_group.dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;
        INIT_WORK(&tqp_vector->tx_group.dim.work, hns3_tx_dim_work);
-       tqp_vector->tx_group.dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;
 }
 
 static int hns3_nic_init_vector_data(struct hns3_nic_priv *priv)
@@ -5023,6 +5021,48 @@ static void hns3_info_show(struct hns3_nic_priv *priv)
        dev_info(priv->dev, "Max mtu size: %u\n", priv->netdev->max_mtu);
 }
 
+static void hns3_set_cq_period_mode(struct hns3_nic_priv *priv,
+                                   enum dim_cq_period_mode mode, bool is_tx)
+{
+       struct hnae3_ae_dev *ae_dev = pci_get_drvdata(priv->ae_handle->pdev);
+       struct hnae3_handle *handle = priv->ae_handle;
+       int i;
+
+       if (is_tx) {
+               priv->tx_cqe_mode = mode;
+
+               for (i = 0; i < priv->vector_num; i++)
+                       priv->tqp_vector[i].tx_group.dim.mode = mode;
+       } else {
+               priv->rx_cqe_mode = mode;
+
+               for (i = 0; i < priv->vector_num; i++)
+                       priv->tqp_vector[i].rx_group.dim.mode = mode;
+       }
+
+       /* only device version above V3(include V3), GL can switch CQ/EQ
+        * period mode.
+        */
+       if (ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V3) {
+               u32 new_mode;
+               u64 reg;
+
+               new_mode = (mode == DIM_CQ_PERIOD_MODE_START_FROM_CQE) ?
+                       HNS3_CQ_MODE_CQE : HNS3_CQ_MODE_EQE;
+               reg = is_tx ? HNS3_GL1_CQ_MODE_REG : HNS3_GL0_CQ_MODE_REG;
+
+               writel(new_mode, handle->kinfo.io_base + reg);
+       }
+}
+
+static void hns3_cq_period_mode_init(struct hns3_nic_priv *priv,
+                                    enum dim_cq_period_mode tx_mode,
+                                    enum dim_cq_period_mode rx_mode)
+{
+       hns3_set_cq_period_mode(priv, tx_mode, true);
+       hns3_set_cq_period_mode(priv, rx_mode, false);
+}
+
 static int hns3_client_init(struct hnae3_handle *handle)
 {
        struct pci_dev *pdev = handle->pdev;
@@ -5090,6 +5130,9 @@ static int hns3_client_init(struct hnae3_handle *handle)
                goto out_init_ring;
        }
 
+       hns3_cq_period_mode_init(priv, DIM_CQ_PERIOD_MODE_START_FROM_EQE,
+                                DIM_CQ_PERIOD_MODE_START_FROM_EQE);
+
        ret = hns3_init_phy(netdev);
        if (ret)
                goto out_init_phy;
@@ -5422,6 +5465,8 @@ static int hns3_reset_notify_init_enet(struct hnae3_handle *handle)
        if (ret)
                goto err_uninit_vector;
 
+       hns3_cq_period_mode_init(priv, priv->tx_cqe_mode, priv->rx_cqe_mode);
+
        /* the device can work without cpu rmap, only aRFS needs it */
        ret = hns3_set_rx_cpu_rmap(netdev);
        if (ret)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h
index b0e696b08b8b826fd3439fb6f9383759366ead0c..ff45825b4b1c86af7431e017cffbd60b88e87ce6 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h
@@ -202,6 +202,12 @@ enum hns3_nic_state {
 
 #define HNS3_RING_EN_B                         0
 
+#define HNS3_GL0_CQ_MODE_REG                   0x20d00
+#define HNS3_GL1_CQ_MODE_REG                   0x20d04
+#define HNS3_GL2_CQ_MODE_REG                   0x20d08
+#define HNS3_CQ_MODE_EQE                       1U
+#define HNS3_CQ_MODE_CQE                       0U
+
 enum hns3_pkt_l2t_type {
        HNS3_L2_TYPE_UNICAST,
        HNS3_L2_TYPE_MULTICAST,
@@ -572,6 +578,8 @@ struct hns3_nic_priv {
 
        unsigned long state;
 
+       enum dim_cq_period_mode tx_cqe_mode;
+       enum dim_cq_period_mode rx_cqe_mode;
        struct hns3_enet_coalesce tx_coal;
        struct hns3_enet_coalesce rx_coal;
        u32 tx_copybreak;

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index 8779a63d51b393cff2404d945a8a583c43c3eb7c..f6882090d38e93631614d1f342c74b7a35a8a3f4 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -1814,6 +1814,7 @@ static int hclge_vport_setup(struct hclge_vport *vport, u16 num_tqps)
        nic->pdev = hdev->pdev;
        nic->ae_algo = &ae_algo;
        nic->numa_node_mask = hdev->numa_node_mask;
+       nic->kinfo.io_base = hdev->hw.io_base;
 
        ret = hclge_knic_setup(vport, num_tqps,
                               hdev->num_tx_desc, hdev->num_rx_desc);

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
index 3a19f08bfff3c1c1f32074ddddd6b124adfb6902..ff651739f16b883f4cf0900d550b7085362d0f57 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c
@@ -539,6 +539,7 @@ static int hclgevf_set_handle_info(struct hclgevf_dev *hdev)
        nic->pdev = hdev->pdev;
        nic->numa_node_mask = hdev->numa_node_mask;
        nic->flags |= HNAE3_SUPPORT_VF;
+       nic->kinfo.io_base = hdev->hw.io_base;
 
        ret = hclgevf_knic_setup(hdev);
        if (ret)