]> www.infradead.org Git - nvme.git/commitdiff
drm/amd/display: Fix refresh rate range for some panel
authorTom Chung <chiahsuan.chung@amd.com>
Fri, 14 Jun 2024 07:38:56 +0000 (15:38 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 1 Jul 2024 20:51:15 +0000 (16:51 -0400)
[Why]
Some of the panels does not have the refresh rate range info
in base EDID and only have the refresh rate range info in
DisplayID block.
It will cause the max/min freesync refresh rate set to 0.

[How]
Try to parse the refresh rate range info from DisplayID if the
max/min refresh rate is 0.

Reviewed-by: Sun peng Li <sunpeng.li@amd.com>
Signed-off-by: Jerry Zuo <jerry.zuo@amd.com>
Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

index 86373251030cb44cf854874a61b61a5788645d92..3cdcadd41be1a6606cbee7ac96266fed0788ec9e 100644 (file)
@@ -11182,6 +11182,49 @@ static bool parse_edid_cea(struct amdgpu_dm_connector *aconnector,
        return ret;
 }
 
+static void parse_edid_displayid_vrr(struct drm_connector *connector,
+               struct edid *edid)
+{
+       u8 *edid_ext = NULL;
+       int i;
+       int j = 0;
+       u16 min_vfreq;
+       u16 max_vfreq;
+
+       if (edid == NULL || edid->extensions == 0)
+               return;
+
+       /* Find DisplayID extension */
+       for (i = 0; i < edid->extensions; i++) {
+               edid_ext = (void *)(edid + (i + 1));
+               if (edid_ext[0] == DISPLAYID_EXT)
+                       break;
+       }
+
+       if (edid_ext == NULL)
+               return;
+
+       while (j < EDID_LENGTH) {
+               /* Get dynamic video timing range from DisplayID if available */
+               if (EDID_LENGTH - j > 13 && edid_ext[j] == 0x25 &&
+                   (edid_ext[j+1] & 0xFE) == 0 && (edid_ext[j+2] == 9)) {
+                       min_vfreq = edid_ext[j+9];
+                       if (edid_ext[j+1] & 7)
+                               max_vfreq = edid_ext[j+10] + ((edid_ext[j+11] & 3) << 8);
+                       else
+                               max_vfreq = edid_ext[j+10];
+
+                       if (max_vfreq && min_vfreq) {
+                               connector->display_info.monitor_range.max_vfreq = max_vfreq;
+                               connector->display_info.monitor_range.min_vfreq = min_vfreq;
+
+                               return;
+                       }
+               }
+               j++;
+       }
+}
+
 static int parse_amd_vsdb(struct amdgpu_dm_connector *aconnector,
                          struct edid *edid, struct amdgpu_hdmi_vsdb_info *vsdb_info)
 {
@@ -11303,6 +11346,11 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
        if (!adev->dm.freesync_module)
                goto update;
 
+       /* Some eDP panels only have the refresh rate range info in DisplayID */
+       if ((connector->display_info.monitor_range.min_vfreq == 0 ||
+            connector->display_info.monitor_range.max_vfreq == 0))
+               parse_edid_displayid_vrr(connector, edid);
+
        if (edid && (sink->sink_signal == SIGNAL_TYPE_DISPLAY_PORT ||
                     sink->sink_signal == SIGNAL_TYPE_EDP)) {
                bool edid_check_required = false;