#include "core.h"
 
 /* Alder Lake: PGD PFET Enable Ack Status Register(s) bitmap */
-const struct pmc_bit_map adl_pfear_map[] = {
+static const struct pmc_bit_map adl_pfear_map[] = {
        {"SPI/eSPI",            BIT(2)},
        {"XHCI",                BIT(3)},
        {"SPA",                 BIT(4)},
        {}
 };
 
-const struct pmc_bit_map *ext_adl_pfear_map[] = {
+static const struct pmc_bit_map *ext_adl_pfear_map[] = {
        /*
         * Check intel_pmc_core_ids[] users of cnp_reg_map for
         * a list of core SoCs using this.
        NULL
 };
 
-const struct pmc_bit_map adl_ltr_show_map[] = {
+static const struct pmc_bit_map adl_ltr_show_map[] = {
        {"SOUTHPORT_A",         CNP_PMC_LTR_SPA},
        {"SOUTHPORT_B",         CNP_PMC_LTR_SPB},
        {"SATA",                CNP_PMC_LTR_SATA},
        {}
 };
 
-const struct pmc_bit_map adl_clocksource_status_map[] = {
+static const struct pmc_bit_map adl_clocksource_status_map[] = {
        {"CLKPART1_OFF_STS",                    BIT(0)},
        {"CLKPART2_OFF_STS",                    BIT(1)},
        {"CLKPART3_OFF_STS",                    BIT(2)},
        {}
 };
 
-const struct pmc_bit_map adl_power_gating_status_0_map[] = {
+static const struct pmc_bit_map adl_power_gating_status_0_map[] = {
        {"PMC_PGD0_PG_STS",                     BIT(0)},
        {"DMI_PGD0_PG_STS",                     BIT(1)},
        {"ESPISPI_PGD0_PG_STS",                 BIT(2)},
        {}
 };
 
-const struct pmc_bit_map adl_power_gating_status_1_map[] = {
+static const struct pmc_bit_map adl_power_gating_status_1_map[] = {
        {"USBR0_PGD0_PG_STS",                   BIT(0)},
        {"SMT1_PGD0_PG_STS",                    BIT(2)},
        {"CSMERTC_PGD0_PG_STS",                 BIT(6)},
        {}
 };
 
-const struct pmc_bit_map adl_power_gating_status_2_map[] = {
+static const struct pmc_bit_map adl_power_gating_status_2_map[] = {
        {"THC0_PGD0_PG_STS",                    BIT(7)},
        {"THC1_PGD0_PG_STS",                    BIT(8)},
        {"SPF_PGD0_PG_STS",                     BIT(14)},
        {}
 };
 
-const struct pmc_bit_map adl_d3_status_0_map[] = {
+static const struct pmc_bit_map adl_d3_status_0_map[] = {
        {"ISH_D3_STS",                          BIT(2)},
        {"LPSS_D3_STS",                         BIT(3)},
        {"XDCI_D3_STS",                         BIT(4)},
        {}
 };
 
-const struct pmc_bit_map adl_d3_status_1_map[] = {
+static const struct pmc_bit_map adl_d3_status_1_map[] = {
        {"GBE_D3_STS",                          BIT(19)},
        {"CNVI_D3_STS",                         BIT(27)},
        {}
 };
 
-const struct pmc_bit_map adl_d3_status_2_map[] = {
+static const struct pmc_bit_map adl_d3_status_2_map[] = {
        {"CSMERTC_D3_STS",                      BIT(1)},
        {"CSE_D3_STS",                          BIT(4)},
        {"KVMCC_D3_STS",                        BIT(5)},
        {}
 };
 
-const struct pmc_bit_map adl_d3_status_3_map[] = {
+static const struct pmc_bit_map adl_d3_status_3_map[] = {
        {"THC0_D3_STS",                         BIT(14)},
        {"THC1_D3_STS",                         BIT(15)},
        {}
 };
 
-const struct pmc_bit_map adl_vnn_req_status_0_map[] = {
+static const struct pmc_bit_map adl_vnn_req_status_0_map[] = {
        {"ISH_VNN_REQ_STS",                     BIT(2)},
        {"ESPISPI_VNN_REQ_STS",                 BIT(18)},
        {"DSP_VNN_REQ_STS",                     BIT(19)},
        {}
 };
 
-const struct pmc_bit_map adl_vnn_req_status_1_map[] = {
+static const struct pmc_bit_map adl_vnn_req_status_1_map[] = {
        {"NPK_VNN_REQ_STS",                     BIT(4)},
        {"EXI_VNN_REQ_STS",                     BIT(9)},
        {"GBE_VNN_REQ_STS",                     BIT(19)},
        {}
 };
 
-const struct pmc_bit_map adl_vnn_req_status_2_map[] = {
+static const struct pmc_bit_map adl_vnn_req_status_2_map[] = {
        {"CSMERTC_VNN_REQ_STS",                 BIT(1)},
        {"CSE_VNN_REQ_STS",                     BIT(4)},
        {"SMT1_VNN_REQ_STS",                    BIT(8)},
        {}
 };
 
-const struct pmc_bit_map adl_vnn_req_status_3_map[] = {
+static const struct pmc_bit_map adl_vnn_req_status_3_map[] = {
        {"GPIOCOM5_VNN_REQ_STS",                BIT(11)},
        {}
 };
 
-const struct pmc_bit_map adl_vnn_misc_status_map[] = {
+static const struct pmc_bit_map adl_vnn_misc_status_map[] = {
        {"CPU_C10_REQ_STS",                     BIT(0)},
        {"PCIe_LPM_En_REQ_STS",                 BIT(3)},
        {"ITH_REQ_STS",                         BIT(5)},
        {}
 };
 
-const struct pmc_bit_map *adl_lpm_maps[] = {
+static const struct pmc_bit_map *adl_lpm_maps[] = {
        adl_clocksource_status_map,
        adl_power_gating_status_0_map,
        adl_power_gating_status_1_map,
 
 
 static const u8 ARL_LPM_REG_INDEX[] = {0, 4, 5, 6, 8, 9, 10, 11, 12, 13, 14, 15, 16, 20};
 
-const struct pmc_bit_map arl_socs_ltr_show_map[] = {
+static const struct pmc_bit_map arl_socs_ltr_show_map[] = {
        {"SOUTHPORT_A",         CNP_PMC_LTR_SPA},
        {"SOUTHPORT_B",         CNP_PMC_LTR_SPB},
        {"SATA",                CNP_PMC_LTR_SATA},
        {}
 };
 
-const struct pmc_bit_map arl_socs_clocksource_status_map[] = {
+static const struct pmc_bit_map arl_socs_clocksource_status_map[] = {
        {"AON2_OFF_STS",                BIT(0)},
        {"AON3_OFF_STS",                BIT(1)},
        {"AON4_OFF_STS",                BIT(2)},
        {}
 };
 
-const struct pmc_bit_map arl_socs_power_gating_status_0_map[] = {
+static const struct pmc_bit_map arl_socs_power_gating_status_0_map[] = {
        {"PMC_PGD0_PG_STS",             BIT(0)},
        {"DMI_PGD0_PG_STS",             BIT(1)},
        {"ESPISPI_PGD0_PG_STS",         BIT(2)},
        {}
 };
 
-const struct pmc_bit_map arl_socs_power_gating_status_1_map[] = {
+static const struct pmc_bit_map arl_socs_power_gating_status_1_map[] = {
        {"USBR0_PGD0_PG_STS",           BIT(0)},
        {"SUSRAM_PGD0_PG_STS",          BIT(1)},
        {"SMT1_PGD0_PG_STS",            BIT(2)},
        {}
 };
 
-const struct pmc_bit_map arl_socs_power_gating_status_2_map[] = {
+static const struct pmc_bit_map arl_socs_power_gating_status_2_map[] = {
        {"PSF8_PGD0_PG_STS",            BIT(0)},
        {"FIA_PGD0_PG_STS",             BIT(1)},
        {"SOC_D2D_PGD3_PG_STS",         BIT(2)},
        {}
 };
 
-const struct pmc_bit_map arl_socs_d3_status_2_map[] = {
+static const struct pmc_bit_map arl_socs_d3_status_2_map[] = {
        {"CSMERTC_D3_STS",              BIT(1)},
        {"SUSRAM_D3_STS",               BIT(2)},
        {"CSE_D3_STS",                  BIT(4)},
        {}
 };
 
-const struct pmc_bit_map arl_socs_d3_status_3_map[] = {
+static const struct pmc_bit_map arl_socs_d3_status_3_map[] = {
        {"GBETSN_D3_STS",               BIT(13)},
        {"THC0_D3_STS",                 BIT(14)},
        {"THC1_D3_STS",                 BIT(15)},
        {}
 };
 
-const struct pmc_bit_map arl_socs_vnn_req_status_3_map[] = {
+static const struct pmc_bit_map arl_socs_vnn_req_status_3_map[] = {
        {"DTS0_VNN_REQ_STS",            BIT(7)},
        {"GPIOCOM5_VNN_REQ_STS",        BIT(11)},
        {}
 };
 
-const struct pmc_bit_map *arl_socs_lpm_maps[] = {
+static const struct pmc_bit_map *arl_socs_lpm_maps[] = {
        arl_socs_clocksource_status_map,
        arl_socs_power_gating_status_0_map,
        arl_socs_power_gating_status_1_map,
        NULL
 };
 
-const struct pmc_bit_map arl_socs_pfear_map[] = {
+static const struct pmc_bit_map arl_socs_pfear_map[] = {
        {"RSVD64",                      BIT(0)},
        {"RSVD65",                      BIT(1)},
        {"RSVD66",                      BIT(2)},
        {}
 };
 
-const struct pmc_bit_map *ext_arl_socs_pfear_map[] = {
+static const struct pmc_bit_map *ext_arl_socs_pfear_map[] = {
        mtl_socm_pfear_map,
        arl_socs_pfear_map,
        NULL
 };
 
-const struct pmc_reg_map arl_socs_reg_map = {
+static const struct pmc_reg_map arl_socs_reg_map = {
        .pfear_sts = ext_arl_socs_pfear_map,
        .ppfear_buckets = ARL_SOCS_PPFEAR_NUM_ENTRIES,
        .pm_read_disable_bit = CNP_PMC_READ_DISABLE_BIT,
        .pson_residency_counter_step = TGL_PSON_RES_COUNTER_STEP,
 };
 
-const struct pmc_bit_map arl_pchs_ltr_show_map[] = {
+static const struct pmc_bit_map arl_pchs_ltr_show_map[] = {
        {"SOUTHPORT_A",         CNP_PMC_LTR_SPA},
        {"SOUTHPORT_B",         CNP_PMC_LTR_SPB},
        {"SATA",                CNP_PMC_LTR_SATA},
        {}
 };
 
-const struct pmc_bit_map arl_pchs_clocksource_status_map[] = {
+static const struct pmc_bit_map arl_pchs_clocksource_status_map[] = {
        {"AON2_OFF_STS",                BIT(0)},
        {"AON3_OFF_STS",                BIT(1)},
        {"AON4_OFF_STS",                BIT(2)},
        {}
 };
 
-const struct pmc_bit_map arl_pchs_power_gating_status_0_map[] = {
+static const struct pmc_bit_map arl_pchs_power_gating_status_0_map[] = {
        {"PMC_PGD0_PG_STS",             BIT(0)},
        {"DMI_PGD0_PG_STS",             BIT(1)},
        {"ESPISPI_PGD0_PG_STS",         BIT(2)},
        {}
 };
 
-const struct pmc_bit_map arl_pchs_power_gating_status_1_map[] = {
+static const struct pmc_bit_map arl_pchs_power_gating_status_1_map[] = {
        {"USBR0_PGD0_PG_STS",           BIT(0)},
        {"SUSRAM_PGD0_PG_STS",          BIT(1)},
        {"SMT1_PGD0_PG_STS",            BIT(2)},
        {}
 };
 
-const struct pmc_bit_map arl_pchs_power_gating_status_2_map[] = {
+static const struct pmc_bit_map arl_pchs_power_gating_status_2_map[] = {
        {"U3FPW2_PGD0_PG_STS",          BIT(0)},
        {"FIA_PGD0_PG_STS",             BIT(1)},
        {"FIACPCB_X_PGD0_PG_STS",       BIT(2)},
        {}
 };
 
-const struct pmc_bit_map arl_pchs_d3_status_0_map[] = {
+static const struct pmc_bit_map arl_pchs_d3_status_0_map[] = {
        {"SPF_D3_STS",                  BIT(0)},
        {"LPSS_D3_STS",                 BIT(3)},
        {"XDCI_D3_STS",                 BIT(4)},
        {}
 };
 
-const struct pmc_bit_map arl_pchs_d3_status_1_map[] = {
+static const struct pmc_bit_map arl_pchs_d3_status_1_map[] = {
        {"GBETSN1_D3_STS",              BIT(14)},
        {"GBE_D3_STS",                  BIT(19)},
        {"ITSS_D3_STS",                 BIT(23)},
        {}
 };
 
-const struct pmc_bit_map arl_pchs_d3_status_2_map[] = {
+static const struct pmc_bit_map arl_pchs_d3_status_2_map[] = {
        {"CSMERTC_D3_STS",              BIT(1)},
        {"SUSRAM_D3_STS",               BIT(2)},
        {"CSE_D3_STS",                  BIT(4)},
        {}
 };
 
-const struct pmc_bit_map arl_pchs_d3_status_3_map[] = {
+static const struct pmc_bit_map arl_pchs_d3_status_3_map[] = {
        {"ESE_D3_STS",                  BIT(3)},
        {"GBETSN_D3_STS",               BIT(13)},
        {"THC0_D3_STS",                 BIT(14)},
        {}
 };
 
-const struct pmc_bit_map arl_pchs_vnn_req_status_0_map[] = {
+static const struct pmc_bit_map arl_pchs_vnn_req_status_0_map[] = {
        {"FIA_VNN_REQ_STS",             BIT(17)},
        {"ESPISPI_VNN_REQ_STS",         BIT(18)},
        {}
 };
 
-const struct pmc_bit_map arl_pchs_vnn_req_status_1_map[] = {
+static const struct pmc_bit_map arl_pchs_vnn_req_status_1_map[] = {
        {"NPK_VNN_REQ_STS",             BIT(4)},
        {"DFXAGG_VNN_REQ_STS",          BIT(8)},
        {"EXI_VNN_REQ_STS",             BIT(9)},
        {}
 };
 
-const struct pmc_bit_map arl_pchs_vnn_req_status_2_map[] = {
+static const struct pmc_bit_map arl_pchs_vnn_req_status_2_map[] = {
        {"FIA2_VNN_REQ_STS",            BIT(0)},
        {"CSMERTC_VNN_REQ_STS",         BIT(1)},
        {"CSE_VNN_REQ_STS",             BIT(4)},
        {}
 };
 
-const struct pmc_bit_map arl_pchs_vnn_req_status_3_map[] = {
+static const struct pmc_bit_map arl_pchs_vnn_req_status_3_map[] = {
        {"ESE_VNN_REQ_STS",             BIT(3)},
        {"DTS0_VNN_REQ_STS",            BIT(7)},
        {"GPIOCOM5_VNN_REQ_STS",        BIT(11)},
        {}
 };
 
-const struct pmc_bit_map arl_pchs_vnn_misc_status_map[] = {
+static const struct pmc_bit_map arl_pchs_vnn_misc_status_map[] = {
        {"CPU_C10_REQ_STS",                     BIT(0)},
        {"TS_OFF_REQ_STS",                      BIT(1)},
        {"PNDE_MET_REQ_STS",                    BIT(2)},
        {}
 };
 
-const struct pmc_bit_map arl_pchs_signal_status_map[] = {
+static const struct pmc_bit_map arl_pchs_signal_status_map[] = {
        {"LSX_Wake0_STS",               BIT(0)},
        {"LSX_Wake1_STS",               BIT(1)},
        {"LSX_Wake2_STS",               BIT(2)},
        {}
 };
 
-const struct pmc_bit_map *arl_pchs_lpm_maps[] = {
+static const struct pmc_bit_map *arl_pchs_lpm_maps[] = {
        arl_pchs_clocksource_status_map,
        arl_pchs_power_gating_status_0_map,
        arl_pchs_power_gating_status_1_map,
        NULL
 };
 
-const struct pmc_reg_map arl_pchs_reg_map = {
+static const struct pmc_reg_map arl_pchs_reg_map = {
        .pfear_sts = ext_arl_socs_pfear_map,
        .ppfear_buckets = ARL_SOCS_PPFEAR_NUM_ENTRIES,
        .pm_read_disable_bit = CNP_PMC_READ_DISABLE_BIT,
 
        {}
 };
 
-const struct pmc_bit_map *ext_cnp_pfear_map[] = {
+static const struct pmc_bit_map *ext_cnp_pfear_map[] = {
        /*
         * Check intel_pmc_core_ids[] users of cnp_reg_map for
         * a list of core SoCs using this.
        NULL
 };
 
-const struct pmc_bit_map cnp_slps0_dbg0_map[] = {
+static const struct pmc_bit_map cnp_slps0_dbg0_map[] = {
        {"AUDIO_D3",            BIT(0)},
        {"OTG_D3",              BIT(1)},
        {"XHCI_D3",             BIT(2)},
        {}
 };
 
-const struct pmc_bit_map cnp_slps0_dbg1_map[] = {
+static const struct pmc_bit_map cnp_slps0_dbg1_map[] = {
        {"SDIO_PLL_OFF",        BIT(0)},
        {"USB2_PLL_OFF",        BIT(1)},
        {"AUDIO_PLL_OFF",       BIT(2)},
        {}
 };
 
-const struct pmc_bit_map cnp_slps0_dbg2_map[] = {
+static const struct pmc_bit_map cnp_slps0_dbg2_map[] = {
        {"MPHY_CORE_GATED",     BIT(0)},
        {"CSME_GATED",          BIT(1)},
        {"USB2_SUS_GATED",      BIT(2)},
 
 };
 
 extern const struct pmc_bit_map msr_map[];
-extern const struct pmc_bit_map spt_pll_map[];
-extern const struct pmc_bit_map spt_mphy_map[];
-extern const struct pmc_bit_map spt_pfear_map[];
-extern const struct pmc_bit_map *ext_spt_pfear_map[];
-extern const struct pmc_bit_map spt_ltr_show_map[];
-extern const struct pmc_reg_map spt_reg_map;
 extern const struct pmc_bit_map cnp_pfear_map[];
-extern const struct pmc_bit_map *ext_cnp_pfear_map[];
-extern const struct pmc_bit_map cnp_slps0_dbg0_map[];
-extern const struct pmc_bit_map cnp_slps0_dbg1_map[];
-extern const struct pmc_bit_map cnp_slps0_dbg2_map[];
 extern const struct pmc_bit_map *cnp_slps0_dbg_maps[];
 extern const struct pmc_bit_map cnp_ltr_show_map[];
 extern const struct pmc_reg_map cnp_reg_map;
-extern const struct pmc_bit_map icl_pfear_map[];
-extern const struct pmc_bit_map *ext_icl_pfear_map[];
-extern const struct pmc_reg_map icl_reg_map;
-extern const struct pmc_bit_map tgl_pfear_map[];
-extern const struct pmc_bit_map *ext_tgl_pfear_map[];
-extern const struct pmc_bit_map tgl_clocksource_status_map[];
-extern const struct pmc_bit_map tgl_power_gating_status_map[];
-extern const struct pmc_bit_map tgl_d3_status_map[];
-extern const struct pmc_bit_map tgl_vnn_req_status_map[];
-extern const struct pmc_bit_map tgl_vnn_misc_status_map[];
 extern const struct pmc_bit_map tgl_signal_status_map[];
-extern const struct pmc_bit_map *tgl_lpm_maps[];
-extern const struct pmc_reg_map tgl_reg_map;
-extern const struct pmc_reg_map tgl_h_reg_map;
-extern const struct pmc_bit_map adl_pfear_map[];
-extern const struct pmc_bit_map *ext_adl_pfear_map[];
-extern const struct pmc_bit_map adl_ltr_show_map[];
-extern const struct pmc_bit_map adl_clocksource_status_map[];
-extern const struct pmc_bit_map adl_power_gating_status_0_map[];
-extern const struct pmc_bit_map adl_power_gating_status_1_map[];
-extern const struct pmc_bit_map adl_power_gating_status_2_map[];
-extern const struct pmc_bit_map adl_d3_status_0_map[];
-extern const struct pmc_bit_map adl_d3_status_1_map[];
-extern const struct pmc_bit_map adl_d3_status_2_map[];
-extern const struct pmc_bit_map adl_d3_status_3_map[];
-extern const struct pmc_bit_map adl_vnn_req_status_0_map[];
-extern const struct pmc_bit_map adl_vnn_req_status_1_map[];
-extern const struct pmc_bit_map adl_vnn_req_status_2_map[];
-extern const struct pmc_bit_map adl_vnn_req_status_3_map[];
-extern const struct pmc_bit_map adl_vnn_misc_status_map[];
-extern const struct pmc_bit_map *adl_lpm_maps[];
 extern const struct pmc_reg_map adl_reg_map;
 extern const struct pmc_bit_map mtl_socm_pfear_map[];
-extern const struct pmc_bit_map *ext_mtl_socm_pfear_map[];
-extern const struct pmc_bit_map mtl_socm_ltr_show_map[];
-extern const struct pmc_bit_map mtl_socm_clocksource_status_map[];
-extern const struct pmc_bit_map mtl_socm_power_gating_status_0_map[];
-extern const struct pmc_bit_map mtl_socm_power_gating_status_1_map[];
-extern const struct pmc_bit_map mtl_socm_power_gating_status_2_map[];
 extern const struct pmc_bit_map mtl_socm_d3_status_0_map[];
 extern const struct pmc_bit_map mtl_socm_d3_status_1_map[];
-extern const struct pmc_bit_map mtl_socm_d3_status_2_map[];
-extern const struct pmc_bit_map mtl_socm_d3_status_3_map[];
 extern const struct pmc_bit_map mtl_socm_vnn_req_status_0_map[];
 extern const struct pmc_bit_map mtl_socm_vnn_req_status_1_map[];
 extern const struct pmc_bit_map mtl_socm_vnn_req_status_2_map[];
-extern const struct pmc_bit_map mtl_socm_vnn_req_status_3_map[];
 extern const struct pmc_bit_map mtl_socm_vnn_misc_status_map[];
 extern const struct pmc_bit_map mtl_socm_signal_status_map[];
-extern const struct pmc_bit_map *mtl_socm_lpm_maps[];
 extern const struct pmc_reg_map mtl_socm_reg_map;
-extern const struct pmc_bit_map mtl_ioep_pfear_map[];
-extern const struct pmc_bit_map *ext_mtl_ioep_pfear_map[];
-extern const struct pmc_bit_map mtl_ioep_ltr_show_map[];
-extern const struct pmc_bit_map mtl_ioep_clocksource_status_map[];
-extern const struct pmc_bit_map mtl_ioep_power_gating_status_0_map[];
-extern const struct pmc_bit_map mtl_ioep_power_gating_status_1_map[];
-extern const struct pmc_bit_map mtl_ioep_power_gating_status_2_map[];
-extern const struct pmc_bit_map mtl_ioep_d3_status_0_map[];
-extern const struct pmc_bit_map mtl_ioep_d3_status_1_map[];
-extern const struct pmc_bit_map mtl_ioep_d3_status_2_map[];
-extern const struct pmc_bit_map mtl_ioep_d3_status_3_map[];
-extern const struct pmc_bit_map mtl_ioep_vnn_req_status_0_map[];
-extern const struct pmc_bit_map mtl_ioep_vnn_req_status_1_map[];
-extern const struct pmc_bit_map mtl_ioep_vnn_req_status_2_map[];
-extern const struct pmc_bit_map mtl_ioep_vnn_req_status_3_map[];
-extern const struct pmc_bit_map mtl_ioep_vnn_misc_status_map[];
-extern const struct pmc_bit_map *mtl_ioep_lpm_maps[];
 extern const struct pmc_reg_map mtl_ioep_reg_map;
-extern const struct pmc_bit_map mtl_ioem_pfear_map[];
-extern const struct pmc_bit_map *ext_mtl_ioem_pfear_map[];
-extern const struct pmc_bit_map mtl_ioem_power_gating_status_1_map[];
-extern const struct pmc_bit_map mtl_ioem_vnn_req_status_1_map[];
-extern const struct pmc_bit_map *mtl_ioem_lpm_maps[];
-extern const struct pmc_reg_map mtl_ioem_reg_map;
-extern const struct pmc_reg_map lnl_socm_reg_map;
-
-/* LNL */
-extern const struct pmc_bit_map lnl_ltr_show_map[];
-extern const struct pmc_bit_map lnl_clocksource_status_map[];
-extern const struct pmc_bit_map lnl_power_gating_status_0_map[];
-extern const struct pmc_bit_map lnl_power_gating_status_1_map[];
-extern const struct pmc_bit_map lnl_power_gating_status_2_map[];
-extern const struct pmc_bit_map lnl_d3_status_0_map[];
-extern const struct pmc_bit_map lnl_d3_status_1_map[];
-extern const struct pmc_bit_map lnl_d3_status_2_map[];
-extern const struct pmc_bit_map lnl_d3_status_3_map[];
-extern const struct pmc_bit_map lnl_vnn_req_status_0_map[];
-extern const struct pmc_bit_map lnl_vnn_req_status_1_map[];
-extern const struct pmc_bit_map lnl_vnn_req_status_2_map[];
-extern const struct pmc_bit_map lnl_vnn_req_status_3_map[];
-extern const struct pmc_bit_map lnl_vnn_misc_status_map[];
-extern const struct pmc_bit_map *lnl_lpm_maps[];
-extern const struct pmc_bit_map *lnl_blk_maps[];
-extern const struct pmc_bit_map lnl_pfear_map[];
-extern const struct pmc_bit_map *ext_lnl_pfear_map[];
-extern const struct pmc_bit_map lnl_signal_status_map[];
-
-/* ARL */
-extern const struct pmc_bit_map arl_socs_ltr_show_map[];
-extern const struct pmc_bit_map arl_socs_clocksource_status_map[];
-extern const struct pmc_bit_map arl_socs_power_gating_status_0_map[];
-extern const struct pmc_bit_map arl_socs_power_gating_status_1_map[];
-extern const struct pmc_bit_map arl_socs_power_gating_status_2_map[];
-extern const struct pmc_bit_map arl_socs_d3_status_2_map[];
-extern const struct pmc_bit_map arl_socs_d3_status_3_map[];
-extern const struct pmc_bit_map arl_socs_vnn_req_status_3_map[];
-extern const struct pmc_bit_map *arl_socs_lpm_maps[];
-extern const struct pmc_bit_map arl_socs_pfear_map[];
-extern const struct pmc_bit_map *ext_arl_socs_pfear_map[];
-extern const struct pmc_reg_map arl_socs_reg_map;
-extern const struct pmc_bit_map arl_pchs_ltr_show_map[];
-extern const struct pmc_bit_map arl_pchs_clocksource_status_map[];
-extern const struct pmc_bit_map arl_pchs_power_gating_status_0_map[];
-extern const struct pmc_bit_map arl_pchs_power_gating_status_1_map[];
-extern const struct pmc_bit_map arl_pchs_power_gating_status_2_map[];
-extern const struct pmc_bit_map arl_pchs_d3_status_0_map[];
-extern const struct pmc_bit_map arl_pchs_d3_status_1_map[];
-extern const struct pmc_bit_map arl_pchs_d3_status_2_map[];
-extern const struct pmc_bit_map arl_pchs_d3_status_3_map[];
-extern const struct pmc_bit_map arl_pchs_vnn_req_status_0_map[];
-extern const struct pmc_bit_map arl_pchs_vnn_req_status_1_map[];
-extern const struct pmc_bit_map arl_pchs_vnn_req_status_2_map[];
-extern const struct pmc_bit_map arl_pchs_vnn_req_status_3_map[];
-extern const struct pmc_bit_map arl_pchs_vnn_misc_status_map[];
-extern const struct pmc_bit_map arl_pchs_signal_status_map[];
-extern const struct pmc_bit_map *arl_pchs_lpm_maps[];
-extern const struct pmc_reg_map arl_pchs_reg_map;
 
 extern void pmc_core_get_tgl_lpm_reqs(struct platform_device *pdev);
 extern int pmc_core_ssram_get_lpm_reqs(struct pmc_dev *pmcdev);
 
 
 #include "core.h"
 
-const struct pmc_bit_map icl_pfear_map[] = {
+static const struct pmc_bit_map icl_pfear_map[] = {
        {"RES_65",              BIT(0)},
        {"RES_66",              BIT(1)},
        {"RES_67",              BIT(2)},
        {}
 };
 
-const struct pmc_bit_map *ext_icl_pfear_map[] = {
+static const struct pmc_bit_map *ext_icl_pfear_map[] = {
        /*
         * Check intel_pmc_core_ids[] users of icl_reg_map for
         * a list of core SoCs using this.
        NULL
 };
 
-const struct pmc_reg_map icl_reg_map = {
+static const struct pmc_reg_map icl_reg_map = {
        .pfear_sts = ext_icl_pfear_map,
        .slp_s0_offset = CNP_PMC_SLP_S0_RES_COUNTER_OFFSET,
        .slp_s0_res_counter_step = ICL_PMC_SLP_S0_RES_COUNTER_STEP,
 
 
 #include "core.h"
 
-const struct pmc_bit_map lnl_ltr_show_map[] = {
+static const struct pmc_bit_map lnl_ltr_show_map[] = {
        {"SOUTHPORT_A",         CNP_PMC_LTR_SPA},
        {"SOUTHPORT_B",         CNP_PMC_LTR_SPB},
        {"SATA",                CNP_PMC_LTR_SATA},
        {}
 };
 
-const struct pmc_bit_map lnl_power_gating_status_0_map[] = {
+static const struct pmc_bit_map lnl_power_gating_status_0_map[] = {
        {"PMC_PGD0_PG_STS",                     BIT(0),         0},
        {"FUSE_OSSE_PGD0_PG_STS",               BIT(1),         0},
        {"ESPISPI_PGD0_PG_STS",                 BIT(2),         0},
        {}
 };
 
-const struct pmc_bit_map lnl_power_gating_status_1_map[] = {
+static const struct pmc_bit_map lnl_power_gating_status_1_map[] = {
        {"USBR0_PGD0_PG_STS",                   BIT(0),         1},
        {"SUSRAM_PGD0_PG_STS",                  BIT(1),         1},
        {"SMT1_PGD0_PG_STS",                    BIT(2),         1},
        {}
 };
 
-const struct pmc_bit_map lnl_power_gating_status_2_map[] = {
+static const struct pmc_bit_map lnl_power_gating_status_2_map[] = {
        {"PSF8_PGD0_PG_STS",                    BIT(0),         0},
        {"SBR16B2_PGD0_PG_STS",                 BIT(1),         0},
        {"D2D_IPU_PGD0_PG_STS",                 BIT(2),         1},
        {}
 };
 
-const struct pmc_bit_map lnl_d3_status_0_map[] = {
+static const struct pmc_bit_map lnl_d3_status_0_map[] = {
        {"LPSS_D3_STS",                         BIT(3),         1},
        {"XDCI_D3_STS",                         BIT(4),         1},
        {"XHCI_D3_STS",                         BIT(5),         1},
        {}
 };
 
-const struct pmc_bit_map lnl_d3_status_1_map[] = {
+static const struct pmc_bit_map lnl_d3_status_1_map[] = {
        {"OSSE_SMT1_D3_STS",                    BIT(7),         0},
        {"GBE_D3_STS",                          BIT(19),        0},
        {"ITSS_D3_STS",                         BIT(23),        0},
        {}
 };
 
-const struct pmc_bit_map lnl_d3_status_2_map[] = {
+static const struct pmc_bit_map lnl_d3_status_2_map[] = {
        {"ESE_D3_STS",                          BIT(0),         0},
        {"CSMERTC_D3_STS",                      BIT(1),         0},
        {"SUSRAM_D3_STS",                       BIT(2),         0},
        {}
 };
 
-const struct pmc_bit_map lnl_d3_status_3_map[] = {
+static const struct pmc_bit_map lnl_d3_status_3_map[] = {
        {"THC0_D3_STS",                         BIT(14),        1},
        {"THC1_D3_STS",                         BIT(15),        1},
        {"OSSE_SMT3_D3_STS",                    BIT(21),        0},
        {}
 };
 
-const struct pmc_bit_map lnl_vnn_req_status_0_map[] = {
+static const struct pmc_bit_map lnl_vnn_req_status_0_map[] = {
        {"LPSS_VNN_REQ_STS",                    BIT(3),         1},
        {"OSSE_VNN_REQ_STS",                    BIT(15),        1},
        {"ESPISPI_VNN_REQ_STS",                 BIT(18),        1},
        {}
 };
 
-const struct pmc_bit_map lnl_vnn_req_status_1_map[] = {
+static const struct pmc_bit_map lnl_vnn_req_status_1_map[] = {
        {"NPK_VNN_REQ_STS",                     BIT(4),         1},
        {"OSSE_SMT1_VNN_REQ_STS",               BIT(7),         1},
        {"DFXAGG_VNN_REQ_STS",                  BIT(8),         0},
        {}
 };
 
-const struct pmc_bit_map lnl_vnn_req_status_2_map[] = {
+static const struct pmc_bit_map lnl_vnn_req_status_2_map[] = {
        {"eSE_VNN_REQ_STS",                     BIT(0),         1},
        {"CSMERTC_VNN_REQ_STS",                 BIT(1),         1},
        {"CSE_VNN_REQ_STS",                     BIT(4),         1},
        {}
 };
 
-const struct pmc_bit_map lnl_vnn_req_status_3_map[] = {
+static const struct pmc_bit_map lnl_vnn_req_status_3_map[] = {
        {"DISP_SHIM_VNN_REQ_STS",               BIT(2),         0},
        {"DTS0_VNN_REQ_STS",                    BIT(7),         0},
        {"GPIOCOM5_VNN_REQ_STS",                BIT(11),        2},
        {}
 };
 
-const struct pmc_bit_map lnl_vnn_misc_status_map[] = {
+static const struct pmc_bit_map lnl_vnn_misc_status_map[] = {
        {"CPU_C10_REQ_STS",                     BIT(0),         0},
        {"TS_OFF_REQ_STS",                      BIT(1),         0},
        {"PNDE_MET_REQ_STS",                    BIT(2),         1},
        {}
 };
 
-const struct pmc_bit_map lnl_clocksource_status_map[] = {
+static const struct pmc_bit_map lnl_clocksource_status_map[] = {
        {"AON2_OFF_STS",                        BIT(0),         0},
        {"AON3_OFF_STS",                        BIT(1),         1},
        {"AON4_OFF_STS",                        BIT(2),         1},
        {}
 };
 
-const struct pmc_bit_map lnl_signal_status_map[] = {
+static const struct pmc_bit_map lnl_signal_status_map[] = {
        {"LSX_Wake0_STS",                       BIT(0),         0},
        {"LSX_Wake1_STS",                       BIT(1),         0},
        {"LSX_Wake2_STS",                       BIT(2),         0},
        {}
 };
 
-const struct pmc_bit_map lnl_rsc_status_map[] = {
+static const struct pmc_bit_map lnl_rsc_status_map[] = {
        {"Memory",                              0,              1},
        {"PSF0",                                0,              1},
        {"PSF4",                                0,              1},
        {}
 };
 
-const struct pmc_bit_map *lnl_lpm_maps[] = {
+static const struct pmc_bit_map *lnl_lpm_maps[] = {
        lnl_clocksource_status_map,
        lnl_power_gating_status_0_map,
        lnl_power_gating_status_1_map,
        NULL
 };
 
-const struct pmc_bit_map *lnl_blk_maps[] = {
+static const struct pmc_bit_map *lnl_blk_maps[] = {
        lnl_power_gating_status_0_map,
        lnl_power_gating_status_1_map,
        lnl_power_gating_status_2_map,
        NULL
 };
 
-const struct pmc_bit_map lnl_pfear_map[] = {
+static const struct pmc_bit_map lnl_pfear_map[] = {
        {"PMC_0",                       BIT(0)},
        {"FUSE_OSSE",                   BIT(1)},
        {"ESPISPI",                     BIT(2)},
        {}
 };
 
-const struct pmc_bit_map *ext_lnl_pfear_map[] = {
+static const struct pmc_bit_map *ext_lnl_pfear_map[] = {
        lnl_pfear_map,
        NULL
 };
 
-const struct pmc_reg_map lnl_socm_reg_map = {
+static const struct pmc_reg_map lnl_socm_reg_map = {
        .pfear_sts = ext_lnl_pfear_map,
        .slp_s0_offset = CNP_PMC_SLP_S0_RES_COUNTER_OFFSET,
        .slp_s0_res_counter_step = TGL_PMC_SLP_S0_RES_COUNTER_STEP,
 
        {}
 };
 
-const struct pmc_bit_map *ext_mtl_socm_pfear_map[] = {
+static const struct pmc_bit_map *ext_mtl_socm_pfear_map[] = {
        mtl_socm_pfear_map,
        NULL
 };
 
-const struct pmc_bit_map mtl_socm_ltr_show_map[] = {
+static const struct pmc_bit_map mtl_socm_ltr_show_map[] = {
        {"SOUTHPORT_A",         CNP_PMC_LTR_SPA},
        {"SOUTHPORT_B",         CNP_PMC_LTR_SPB},
        {"SATA",                CNP_PMC_LTR_SATA},
        {}
 };
 
-const struct pmc_bit_map mtl_socm_clocksource_status_map[] = {
+static const struct pmc_bit_map mtl_socm_clocksource_status_map[] = {
        {"AON2_OFF_STS",                 BIT(0)},
        {"AON3_OFF_STS",                 BIT(1)},
        {"AON4_OFF_STS",                 BIT(2)},
        {}
 };
 
-const struct pmc_bit_map mtl_socm_power_gating_status_0_map[] = {
+static const struct pmc_bit_map mtl_socm_power_gating_status_0_map[] = {
        {"PMC_PGD0_PG_STS",              BIT(0)},
        {"DMI_PGD0_PG_STS",              BIT(1)},
        {"ESPISPI_PGD0_PG_STS",          BIT(2)},
        {}
 };
 
-const struct pmc_bit_map mtl_socm_power_gating_status_1_map[] = {
+static const struct pmc_bit_map mtl_socm_power_gating_status_1_map[] = {
        {"USBR0_PGD0_PG_STS",            BIT(0)},
        {"SUSRAM_PGD0_PG_STS",           BIT(1)},
        {"SMT1_PGD0_PG_STS",             BIT(2)},
        {}
 };
 
-const struct pmc_bit_map mtl_socm_power_gating_status_2_map[] = {
+static const struct pmc_bit_map mtl_socm_power_gating_status_2_map[] = {
        {"PSF8_PGD0_PG_STS",             BIT(0)},
        {"FIA_PGD0_PG_STS",              BIT(1)},
        {"SOC_D2D_PGD1_PG_STS",          BIT(2)},
        {}
 };
 
-const struct pmc_bit_map mtl_socm_d3_status_2_map[] = {
+static const struct pmc_bit_map mtl_socm_d3_status_2_map[] = {
        {"GNA_D3_STS",                   BIT(0)},
        {"CSMERTC_D3_STS",               BIT(1)},
        {"SUSRAM_D3_STS",                BIT(2)},
        {}
 };
 
-const struct pmc_bit_map mtl_socm_d3_status_3_map[] = {
+static const struct pmc_bit_map mtl_socm_d3_status_3_map[] = {
        {"ESE_D3_STS",                   BIT(2)},
        {"GBETSN_D3_STS",                BIT(13)},
        {"THC0_D3_STS",                  BIT(14)},
        {}
 };
 
-const struct pmc_bit_map mtl_socm_vnn_req_status_3_map[] = {
+static const struct pmc_bit_map mtl_socm_vnn_req_status_3_map[] = {
        {"ESE_VNN_REQ_STS",              BIT(2)},
        {"DTS0_VNN_REQ_STS",             BIT(7)},
        {"GPIOCOM5_VNN_REQ_STS",         BIT(11)},
        {}
 };
 
-const struct pmc_bit_map *mtl_socm_lpm_maps[] = {
+static const struct pmc_bit_map *mtl_socm_lpm_maps[] = {
        mtl_socm_clocksource_status_map,
        mtl_socm_power_gating_status_0_map,
        mtl_socm_power_gating_status_1_map,
        .lpm_reg_index = MTL_LPM_REG_INDEX,
 };
 
-const struct pmc_bit_map mtl_ioep_pfear_map[] = {
+static const struct pmc_bit_map mtl_ioep_pfear_map[] = {
        {"PMC_0",               BIT(0)},
        {"OPI",                 BIT(1)},
        {"TCSS",                BIT(2)},
        {}
 };
 
-const struct pmc_bit_map *ext_mtl_ioep_pfear_map[] = {
+static const struct pmc_bit_map *ext_mtl_ioep_pfear_map[] = {
        mtl_ioep_pfear_map,
        NULL
 };
 
-const struct pmc_bit_map mtl_ioep_ltr_show_map[] = {
+static const struct pmc_bit_map mtl_ioep_ltr_show_map[] = {
        {"SOUTHPORT_A",         CNP_PMC_LTR_SPA},
        {"SOUTHPORT_B",         CNP_PMC_LTR_SPB},
        {"SATA",                CNP_PMC_LTR_SATA},
        {}
 };
 
-const struct pmc_bit_map mtl_ioep_clocksource_status_map[] = {
+static const struct pmc_bit_map mtl_ioep_clocksource_status_map[] = {
        {"AON2_OFF_STS",                 BIT(0)},
        {"AON3_OFF_STS",                 BIT(1)},
        {"AON4_OFF_STS",                 BIT(2)},
        {}
 };
 
-const struct pmc_bit_map mtl_ioep_power_gating_status_0_map[] = {
+static const struct pmc_bit_map mtl_ioep_power_gating_status_0_map[] = {
        {"PMC_PGD0_PG_STS",              BIT(0)},
        {"DMI_PGD0_PG_STS",              BIT(1)},
        {"TCSS_PGD0_PG_STS",             BIT(2)},
        {}
 };
 
-const struct pmc_bit_map mtl_ioep_power_gating_status_1_map[] = {
+static const struct pmc_bit_map mtl_ioep_power_gating_status_1_map[] = {
        {"PSF9_PGD0_PG_STS",             BIT(0)},
        {"MPFPW4_PGD0_PG_STS",           BIT(1)},
        {"SBR0_PGD0_PG_STS",             BIT(8)},
        {}
 };
 
-const struct pmc_bit_map mtl_ioep_power_gating_status_2_map[] = {
+static const struct pmc_bit_map mtl_ioep_power_gating_status_2_map[] = {
        {"FIA_PGD0_PG_STS",              BIT(1)},
        {"FIA_P_PGD0_PG_STS",            BIT(3)},
        {"TAM_PGD0_PG_STS",              BIT(4)},
        {}
 };
 
-const struct pmc_bit_map mtl_ioep_d3_status_0_map[] = {
+static const struct pmc_bit_map mtl_ioep_d3_status_0_map[] = {
        {"SPF_D3_STS",                   BIT(0)},
        {"SPA_D3_STS",                   BIT(12)},
        {"SPB_D3_STS",                   BIT(13)},
        {}
 };
 
-const struct pmc_bit_map mtl_ioep_d3_status_1_map[] = {
+static const struct pmc_bit_map mtl_ioep_d3_status_1_map[] = {
        {"GBETSN1_D3_STS",               BIT(14)},
        {"P2S_D3_STS",                   BIT(24)},
        {}
 };
 
-const struct pmc_bit_map mtl_ioep_d3_status_2_map[] = {
+static const struct pmc_bit_map mtl_ioep_d3_status_2_map[] = {
        {}
 };
 
-const struct pmc_bit_map mtl_ioep_d3_status_3_map[] = {
+static const struct pmc_bit_map mtl_ioep_d3_status_3_map[] = {
        {"GBETSN_D3_STS",                BIT(13)},
        {"ACE_D3_STS",                   BIT(23)},
        {}
 };
 
-const struct pmc_bit_map mtl_ioep_vnn_req_status_0_map[] = {
+static const struct pmc_bit_map mtl_ioep_vnn_req_status_0_map[] = {
        {"FIA_VNN_REQ_STS",              BIT(17)},
        {}
 };
 
-const struct pmc_bit_map mtl_ioep_vnn_req_status_1_map[] = {
+static const struct pmc_bit_map mtl_ioep_vnn_req_status_1_map[] = {
        {"DFXAGG_VNN_REQ_STS",           BIT(8)},
        {}
 };
 
-const struct pmc_bit_map mtl_ioep_vnn_req_status_2_map[] = {
+static const struct pmc_bit_map mtl_ioep_vnn_req_status_2_map[] = {
        {}
 };
 
-const struct pmc_bit_map mtl_ioep_vnn_req_status_3_map[] = {
+static const struct pmc_bit_map mtl_ioep_vnn_req_status_3_map[] = {
        {"DTS0_VNN_REQ_STS",             BIT(7)},
        {"DISP_VNN_REQ_STS",             BIT(19)},
        {}
 };
 
-const struct pmc_bit_map mtl_ioep_vnn_misc_status_map[] = {
+static const struct pmc_bit_map mtl_ioep_vnn_misc_status_map[] = {
        {"CPU_C10_REQ_STS",              BIT(0)},
        {"TS_OFF_REQ_STS",               BIT(1)},
        {"PNDE_MET_REQ_STS",             BIT(2)},
        {}
 };
 
-const struct pmc_bit_map *mtl_ioep_lpm_maps[] = {
+static const struct pmc_bit_map *mtl_ioep_lpm_maps[] = {
        mtl_ioep_clocksource_status_map,
        mtl_ioep_power_gating_status_0_map,
        mtl_ioep_power_gating_status_1_map,
        .lpm_reg_index = MTL_LPM_REG_INDEX,
 };
 
-const struct pmc_bit_map mtl_ioem_pfear_map[] = {
+static const struct pmc_bit_map mtl_ioem_pfear_map[] = {
        {"PMC_0",               BIT(0)},
        {"OPI",                 BIT(1)},
        {"TCSS",                BIT(2)},
        {}
 };
 
-const struct pmc_bit_map *ext_mtl_ioem_pfear_map[] = {
+static const struct pmc_bit_map *ext_mtl_ioem_pfear_map[] = {
        mtl_ioem_pfear_map,
        NULL
 };
 
-const struct pmc_bit_map mtl_ioem_power_gating_status_1_map[] = {
+static const struct pmc_bit_map mtl_ioem_power_gating_status_1_map[] = {
        {"PSF9_PGD0_PG_STS",                    BIT(0)},
        {"MPFPW4_PGD0_PG_STS",                  BIT(1)},
        {"SBR0_PGD0_PG_STS",                    BIT(8)},
        {}
 };
 
-const struct pmc_bit_map *mtl_ioem_lpm_maps[] = {
+static const struct pmc_bit_map *mtl_ioem_lpm_maps[] = {
        mtl_ioep_clocksource_status_map,
        mtl_ioep_power_gating_status_0_map,
        mtl_ioem_power_gating_status_1_map,
        NULL
 };
 
-const struct pmc_reg_map mtl_ioem_reg_map = {
+static const struct pmc_reg_map mtl_ioem_reg_map = {
        .regmap_length = MTL_IOE_PMC_MMIO_REG_LEN,
        .pfear_sts = ext_mtl_ioem_pfear_map,
        .ppfear0_offset = CNP_PMC_HOST_PPFEAR0A,
 
 
 #include "core.h"
 
-const struct pmc_bit_map spt_pll_map[] = {
+static const struct pmc_bit_map spt_pll_map[] = {
        {"MIPI PLL",                    SPT_PMC_BIT_MPHY_CMN_LANE0},
        {"GEN2 USB2PCIE2 PLL",          SPT_PMC_BIT_MPHY_CMN_LANE1},
        {"DMIPCIE3 PLL",                SPT_PMC_BIT_MPHY_CMN_LANE2},
        {}
 };
 
-const struct pmc_bit_map spt_mphy_map[] = {
+static const struct pmc_bit_map spt_mphy_map[] = {
        {"MPHY CORE LANE 0",           SPT_PMC_BIT_MPHY_LANE0},
        {"MPHY CORE LANE 1",           SPT_PMC_BIT_MPHY_LANE1},
        {"MPHY CORE LANE 2",           SPT_PMC_BIT_MPHY_LANE2},
        {}
 };
 
-const struct pmc_bit_map spt_pfear_map[] = {
+static const struct pmc_bit_map spt_pfear_map[] = {
        {"PMC",                         SPT_PMC_BIT_PMC},
        {"OPI-DMI",                     SPT_PMC_BIT_OPI},
        {"SPI / eSPI",                  SPT_PMC_BIT_SPI},
        {}
 };
 
-const struct pmc_bit_map *ext_spt_pfear_map[] = {
+static const struct pmc_bit_map *ext_spt_pfear_map[] = {
        /*
         * Check intel_pmc_core_ids[] users of spt_reg_map for
         * a list of core SoCs using this.
        NULL
 };
 
-const struct pmc_bit_map spt_ltr_show_map[] = {
+static const struct pmc_bit_map spt_ltr_show_map[] = {
        {"SOUTHPORT_A",         SPT_PMC_LTR_SPA},
        {"SOUTHPORT_B",         SPT_PMC_LTR_SPB},
        {"SATA",                SPT_PMC_LTR_SATA},
        {}
 };
 
-const struct pmc_reg_map spt_reg_map = {
+static const struct pmc_reg_map spt_reg_map = {
        .pfear_sts = ext_spt_pfear_map,
        .mphy_sts = spt_mphy_map,
        .pll_sts = spt_pll_map,
 
        PCH_LP
 };
 
-const struct pmc_bit_map tgl_pfear_map[] = {
+static const struct pmc_bit_map tgl_pfear_map[] = {
        {"PSF9",                BIT(0)},
        {"RES_66",              BIT(1)},
        {"RES_67",              BIT(2)},
        {}
 };
 
-const struct pmc_bit_map *ext_tgl_pfear_map[] = {
+static const struct pmc_bit_map *ext_tgl_pfear_map[] = {
        /*
         * Check intel_pmc_core_ids[] users of tgl_reg_map for
         * a list of core SoCs using this.
        NULL
 };
 
-const struct pmc_bit_map tgl_clocksource_status_map[] = {
+static const struct pmc_bit_map tgl_clocksource_status_map[] = {
        {"USB2PLL_OFF_STS",                     BIT(18)},
        {"PCIe/USB3.1_Gen2PLL_OFF_STS",         BIT(19)},
        {"PCIe_Gen3PLL_OFF_STS",                BIT(20)},
        {}
 };
 
-const struct pmc_bit_map tgl_power_gating_status_map[] = {
+static const struct pmc_bit_map tgl_power_gating_status_map[] = {
        {"CSME_PG_STS",                         BIT(0)},
        {"SATA_PG_STS",                         BIT(1)},
        {"xHCI_PG_STS",                         BIT(2)},
        {}
 };
 
-const struct pmc_bit_map tgl_d3_status_map[] = {
+static const struct pmc_bit_map tgl_d3_status_map[] = {
        {"ADSP_D3_STS",                         BIT(0)},
        {"SATA_D3_STS",                         BIT(1)},
        {"xHCI0_D3_STS",                        BIT(2)},
        {}
 };
 
-const struct pmc_bit_map tgl_vnn_req_status_map[] = {
+static const struct pmc_bit_map tgl_vnn_req_status_map[] = {
        {"GPIO_COM0_VNN_REQ_STS",               BIT(1)},
        {"GPIO_COM1_VNN_REQ_STS",               BIT(2)},
        {"GPIO_COM2_VNN_REQ_STS",               BIT(3)},
        {}
 };
 
-const struct pmc_bit_map tgl_vnn_misc_status_map[] = {
+static const struct pmc_bit_map tgl_vnn_misc_status_map[] = {
        {"CPU_C10_REQ_STS_0",                   BIT(0)},
        {"PCIe_LPM_En_REQ_STS_3",               BIT(3)},
        {"ITH_REQ_STS_5",                       BIT(5)},
        {}
 };
 
-const struct pmc_bit_map *tgl_lpm_maps[] = {
+static const struct pmc_bit_map *tgl_lpm_maps[] = {
        tgl_clocksource_status_map,
        tgl_power_gating_status_map,
        tgl_d3_status_map,
        NULL
 };
 
-const struct pmc_reg_map tgl_reg_map = {
+static const struct pmc_reg_map tgl_reg_map = {
        .pfear_sts = ext_tgl_pfear_map,
        .slp_s0_offset = CNP_PMC_SLP_S0_RES_COUNTER_OFFSET,
        .slp_s0_res_counter_step = TGL_PMC_SLP_S0_RES_COUNTER_STEP,
        .etr3_offset = ETR3_OFFSET,
 };
 
-const struct pmc_reg_map tgl_h_reg_map = {
+static const struct pmc_reg_map tgl_h_reg_map = {
        .pfear_sts = ext_tgl_pfear_map,
        .slp_s0_offset = CNP_PMC_SLP_S0_RES_COUNTER_OFFSET,
        .slp_s0_res_counter_step = TGL_PMC_SLP_S0_RES_COUNTER_STEP,