drm/amd/display: Multiplication result converted to larger type

Consolidating multiple CodeQL Fixes for alerts with rule id: cpp/integer-multiplication-cast-to-long

Reviewed-by: Joshua Aberback <joshua.aberback@amd.com>
Signed-off-by: Clay King <clayking@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c b/drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c
index d897f8a30edee58eb7dac3225fb8b861ad84f628..4da5adab799ce99fc538ae98ef7c85e5ce32c48c 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c
+++ b/drivers/gpu/drm/amd/display/dc/basics/dce_calcs.c
@@ -1136,7 +1136,7 @@ static void calculate_bandwidth(
                        }
                }
        }
-       data->total_dmifmc_urgent_trips = bw_ceil2(bw_div(data->total_requests_for_adjusted_dmif_size, (bw_add(dceip->dmif_request_buffer_size, bw_int_to_fixed(vbios->number_of_request_slots_gmc_reserves_for_dmif_per_channel * data->number_of_dram_channels)))), bw_int_to_fixed(1));
+       data->total_dmifmc_urgent_trips = bw_ceil2(bw_div(data->total_requests_for_adjusted_dmif_size, (bw_add(dceip->dmif_request_buffer_size, bw_int_to_fixed((uint64_t)vbios->number_of_request_slots_gmc_reserves_for_dmif_per_channel * data->number_of_dram_channels)))), bw_int_to_fixed(1));
        data->total_dmifmc_urgent_latency = bw_mul(vbios->dmifmc_urgent_latency, data->total_dmifmc_urgent_trips);
        data->total_display_reads_required_data = bw_int_to_fixed(0);
        data->total_display_reads_required_dram_access_data = bw_int_to_fixed(0);

diff --git a/drivers/gpu/drm/amd/display/dc/basics/fixpt31_32.c b/drivers/gpu/drm/amd/display/dc/basics/fixpt31_32.c
index 452206b5095eb0f77fecc890bdfe0ef1ea8b5fcd..6073cadde76c7639093b567fc5865de008735666 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/basics/fixpt31_32.c
+++ b/drivers/gpu/drm/amd/display/dc/basics/fixpt31_32.c
@@ -284,7 +284,7 @@ struct fixed31_32 dc_fixpt_cos(struct fixed31_32 arg)
                                dc_fixpt_mul(
                                        square,
                                        res),
-                               n * (n - 1)));
+                               (long long)n * (n - 1)));
 
                n -= 2;
        } while (n != 0);

diff --git a/drivers/gpu/drm/amd/display/dc/basics/vector.c b/drivers/gpu/drm/amd/display/dc/basics/vector.c
index 6d2924114a3e8b8c70fbb2c69ee7f07c0aad3b85..b413a672c2c0f3672b1a700e6c3cdd0bb166f0be 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/basics/vector.c
+++ b/drivers/gpu/drm/amd/display/dc/basics/vector.c
@@ -170,7 +170,7 @@ bool dal_vector_remove_at_index(
                memmove(
                        vector->container + (index * vector->struct_size),
                        vector->container + ((index + 1) * vector->struct_size),
-                       (vector->count - index - 1) * vector->struct_size);
+                       (size_t)(vector->count - index - 1) * vector->struct_size);
        vector->count -= 1;
 
        return true;
@@ -219,7 +219,7 @@ bool dal_vector_insert_at(
                memmove(
                        insert_address + vector->struct_size,
                        insert_address,
-                       vector->struct_size * (vector->count - position));
+                       (size_t)vector->struct_size * (vector->count - position));
 
        memmove(
                insert_address,
@@ -271,7 +271,7 @@ struct vector *dal_vector_clone(
 
        /* copy vector's data */
        memmove(vec_cloned->container, vector->container,
-                       vec_cloned->struct_size * vec_cloned->capacity);
+                       (size_t)vec_cloned->struct_size * vec_cloned->capacity);
 
        return vec_cloned;
 }

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
index 6160952245b4332c3e015a9e08f0a93ad22856a8..7cd7bddea4236db9f3bce498b1c31c96102a4588 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
@@ -3401,7 +3401,7 @@ bool dcn32_allow_subvp_with_active_margin(struct pipe_ctx *pipe)
                uint32_t height = subvp_active_margin_list.res[i].height;
 
                refresh_rate = (pipe->stream->timing.pix_clk_100hz * (uint64_t)100 +
-                       pipe->stream->timing.v_total * pipe->stream->timing.h_total - (uint64_t)1);
+                       (uint64_t)pipe->stream->timing.v_total * pipe->stream->timing.h_total - (uint64_t)1);
                refresh_rate = div_u64(refresh_rate, pipe->stream->timing.v_total);
                refresh_rate = div_u64(refresh_rate, pipe->stream->timing.h_total);
 

diff --git a/drivers/gpu/drm/amd/display/dc/mmhubbub/dcn20/dcn20_mmhubbub.c b/drivers/gpu/drm/amd/display/dc/mmhubbub/dcn20/dcn20_mmhubbub.c
index 259a98e4ee2c28e50939e61ed27fea5e257e13f8..2a422e223bf2a9cff33b41c55b0ae6e43e722f1c 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/mmhubbub/dcn20/dcn20_mmhubbub.c
+++ b/drivers/gpu/drm/amd/display/dc/mmhubbub/dcn20/dcn20_mmhubbub.c
@@ -284,7 +284,7 @@ void mcifwb2_dump_frame(struct mcif_wb *mcif_wb,
 
        REG_UPDATE(MCIF_WB_BUFMGR_SW_CONTROL, MCIF_WB_BUFMGR_SW_LOCK, 0xf);
 
-       memcpy(dest_luma_buffer,   luma_buffer,   mcif_params->luma_pitch * dest_height);
+       memcpy(dest_luma_buffer,   luma_buffer,   (size_t)mcif_params->luma_pitch * dest_height);
        memcpy(dest_chroma_buffer, chroma_buffer, mcif_params->chroma_pitch * dest_height / 2);
 
        REG_UPDATE(MCIF_WB_BUFMGR_SW_CONTROL, MCIF_WB_BUFMGR_SW_LOCK, 0x0);

diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c
index 164ba796f64ce1360f86eda954fb700ccd3d3665..869a8e515fc09dbd8621686a5ba0a22a24b62e9b 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dce112/dce112_resource.c
@@ -1111,12 +1111,12 @@ static void bw_calcs_data_update_from_pplib(struct dc *dc)
                                &clks);
 
                dc->bw_vbios->low_yclk = bw_frc_to_fixed(
-                       clks.clocks_in_khz[0] * memory_type_multiplier, 1000);
+                       (int64_t)clks.clocks_in_khz[0] * memory_type_multiplier, 1000);
                dc->bw_vbios->mid_yclk = bw_frc_to_fixed(
-                       clks.clocks_in_khz[clks.num_levels>>1] * memory_type_multiplier,
+                       (int64_t)clks.clocks_in_khz[clks.num_levels>>1] * memory_type_multiplier,
                        1000);
                dc->bw_vbios->high_yclk = bw_frc_to_fixed(
-                       clks.clocks_in_khz[clks.num_levels-1] * memory_type_multiplier,
+                       (int64_t)clks.clocks_in_khz[clks.num_levels-1] * memory_type_multiplier,
                        1000);
 
                return;
@@ -1152,12 +1152,12 @@ static void bw_calcs_data_update_from_pplib(struct dc *dc)
         * YCLK = UMACLK*m_memoryTypeMultiplier
         */
        dc->bw_vbios->low_yclk = bw_frc_to_fixed(
-               mem_clks.data[0].clocks_in_khz * memory_type_multiplier, 1000);
+               (int64_t)mem_clks.data[0].clocks_in_khz * memory_type_multiplier, 1000);
        dc->bw_vbios->mid_yclk = bw_frc_to_fixed(
-               mem_clks.data[mem_clks.num_levels>>1].clocks_in_khz * memory_type_multiplier,
+               (int64_t)mem_clks.data[mem_clks.num_levels>>1].clocks_in_khz * memory_type_multiplier,
                1000);
        dc->bw_vbios->high_yclk = bw_frc_to_fixed(
-               mem_clks.data[mem_clks.num_levels-1].clocks_in_khz * memory_type_multiplier,
+               (int64_t)mem_clks.data[mem_clks.num_levels-1].clocks_in_khz * memory_type_multiplier,
                1000);
 
        /* Now notify PPLib/SMU about which Watermarks sets they should select

diff --git a/drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c
index eb1e158d34361d4b47b2d630ddbe958936edef54..2f23cc6df571172cfe05e94185017ae509efc8e7 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dce120/dce120_resource.c
@@ -990,12 +990,12 @@ static void bw_calcs_data_update_from_pplib(struct dc *dc)
                memory_type_multiplier = MEMORY_TYPE_HBM;
 
        dc->bw_vbios->low_yclk = bw_frc_to_fixed(
-               mem_clks.data[0].clocks_in_khz * memory_type_multiplier, 1000);
+               (int64_t)mem_clks.data[0].clocks_in_khz * memory_type_multiplier, 1000);
        dc->bw_vbios->mid_yclk = bw_frc_to_fixed(
-               mem_clks.data[mem_clks.num_levels>>1].clocks_in_khz * memory_type_multiplier,
+               (int64_t)mem_clks.data[mem_clks.num_levels>>1].clocks_in_khz * memory_type_multiplier,
                1000);
        dc->bw_vbios->high_yclk = bw_frc_to_fixed(
-               mem_clks.data[mem_clks.num_levels-1].clocks_in_khz * memory_type_multiplier,
+               (int64_t)mem_clks.data[mem_clks.num_levels-1].clocks_in_khz * memory_type_multiplier,
                1000);
 
        /* Now notify PPLib/SMU about which Watermarks sets they should select