return regmap_write(chip->regmap, LAN9303_VIRT_PHY_BASE + regnum, val);
 }
 
-static int lan9303_port_phy_reg_wait_for_completion(struct lan9303 *chip)
+static int lan9303_indirect_phy_wait_for_completion(struct lan9303 *chip)
 {
        int ret, i;
        u32 reg;
        return -EIO;
 }
 
-static int lan9303_port_phy_reg_read(struct lan9303 *chip, int addr, int regnum)
+static int lan9303_indirect_phy_read(struct lan9303 *chip, int addr, int regnum)
 {
        int ret;
        u32 val;
 
        mutex_lock(&chip->indirect_mutex);
 
-       ret = lan9303_port_phy_reg_wait_for_completion(chip);
+       ret = lan9303_indirect_phy_wait_for_completion(chip);
        if (ret)
                goto on_error;
 
        if (ret)
                goto on_error;
 
-       ret = lan9303_port_phy_reg_wait_for_completion(chip);
+       ret = lan9303_indirect_phy_wait_for_completion(chip);
        if (ret)
                goto on_error;
 
        return ret;
 }
 
-static int lan9303_phy_reg_write(struct lan9303 *chip, int addr, int regnum,
-                                unsigned int val)
+static int lan9303_indirect_phy_write(struct lan9303 *chip, int addr,
+                                     int regnum, u16 val)
 {
        int ret;
        u32 reg;
 
        mutex_lock(&chip->indirect_mutex);
 
-       ret = lan9303_port_phy_reg_wait_for_completion(chip);
+       ret = lan9303_indirect_phy_wait_for_completion(chip);
        if (ret)
                goto on_error;
 
         * 0x0000, which means 'phy_addr_sel_strap' is 1 and the IDs are 1-2-3.
         * 0xffff is returned on MDIO read with no response.
         */
-       reg = lan9303_port_phy_reg_read(chip, 3, MII_LAN911X_SPECIAL_MODES);
+       reg = lan9303_indirect_phy_read(chip, 3, MII_LAN911X_SPECIAL_MODES);
        if (reg < 0) {
                dev_err(chip->dev, "Failed to detect phy config: %d\n", reg);
                return reg;
        if (phy > phy_base + 2)
                return -ENODEV;
 
-       return lan9303_port_phy_reg_read(chip, phy, regnum);
+       return lan9303_indirect_phy_read(chip, phy, regnum);
 }
 
 static int lan9303_phy_write(struct dsa_switch *ds, int phy, int regnum,
        if (phy > phy_base + 2)
                return -ENODEV;
 
-       return lan9303_phy_reg_write(chip, phy, regnum, val);
+       return lan9303_indirect_phy_write(chip, phy, regnum, val);
 }
 
 static int lan9303_port_enable(struct dsa_switch *ds, int port,
        switch (port) {
        case 1:
                lan9303_disable_packet_processing(chip, LAN9303_PORT_1_OFFSET);
-               lan9303_phy_reg_write(chip, chip->phy_addr_sel_strap + 1,
-                                     MII_BMCR, BMCR_PDOWN);
+               lan9303_indirect_phy_write(chip, chip->phy_addr_sel_strap + 1,
+                                          MII_BMCR, BMCR_PDOWN);
                break;
        case 2:
                lan9303_disable_packet_processing(chip, LAN9303_PORT_2_OFFSET);
-               lan9303_phy_reg_write(chip, chip->phy_addr_sel_strap + 2,
-                                     MII_BMCR, BMCR_PDOWN);
+               lan9303_indirect_phy_write(chip, chip->phy_addr_sel_strap + 2,
+                                          MII_BMCR, BMCR_PDOWN);
                break;
        default:
                dev_dbg(chip->dev,