drm/amdgpu: init umc functions for arcturus umc ras

reuse vg20 umc functions for arcturus umc ras

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: John Clements <John.Clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 9f2a893871ecd21a01da46837fb75ff9cd9bebca..ee615d05083737f9e27b06bd1d5a926ee6d3245b 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -639,6 +639,7 @@ static void gmc_v9_0_set_umc_funcs(struct amdgpu_device *adev)
                adev->umc.funcs = &umc_v6_0_funcs;
                break;
        case CHIP_VEGA20:
+       case CHIP_ARCTURUS:
                adev->umc.max_ras_err_cnt_per_query = UMC_V6_1_TOTAL_CHANNEL_NUM;
                adev->umc.channel_inst_num = UMC_V6_1_CHANNEL_INSTANCE_NUM;
                adev->umc.umc_inst_num = UMC_V6_1_UMC_INSTANCE_NUM;
@@ -752,6 +753,7 @@ static int gmc_v9_0_late_init(void *handle)
                switch (adev->asic_type) {
                case CHIP_VEGA10:
                case CHIP_VEGA20:
+               case CHIP_ARCTURUS:
                        r = amdgpu_atomfirmware_mem_ecc_supported(adev);
                        if (!r) {
                                DRM_INFO("ECC is not present.\n");