arm64: dts: renesas: r8a774a1: Add dynamic power coefficient

Describe the dynamic power coefficient of A57 and A53 CPUs.

Based on work by Gaku Inami <gaku.inami.xw@bp.renesas.com> and others.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
index 7d5e19c8cbd529dd0f149e7ffce9189486f44f13..b437edc04712b07dff6b1e379aaa76497bd68575 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi
@@ -135,6 +135,7 @@
                        power-domains = <&sysc R8A774A1_PD_CA57_CPU0>;
                        next-level-cache = <&L2_CA57>;
                        enable-method = "psci";
+                       dynamic-power-coefficient = <854>;
                        clocks = <&cpg CPG_CORE R8A774A1_CLK_Z>;
                        operating-points-v2 = <&cluster0_opp>;
                        capacity-dmips-mhz = <1024>;
@@ -162,6 +163,7 @@
                        next-level-cache = <&L2_CA53>;
                        enable-method = "psci";
                        #cooling-cells = <2>;
+                       dynamic-power-coefficient = <277>;
                        clocks = <&cpg CPG_CORE R8A774A1_CLK_Z2>;
                        operating-points-v2 = <&cluster1_opp>;
                        capacity-dmips-mhz = <560>;