seq_printf(m, "GPU idle: %s\n", yesno(!dev_priv->mm.busy));
        seq_printf(m, "IRQs disabled: %s\n",
-                  yesno(dev_priv->pm.irqs_disabled));
+                  yesno(!intel_irqs_enabled(dev_priv)));
 
        return 0;
 }
 
  */
 struct i915_runtime_pm {
        bool suspended;
-       bool irqs_disabled;
+       bool _irqs_disabled;
 };
 
 enum intel_pipe_crc_source {
 
        unsigned long timeout_expire;
        int ret;
 
-       WARN(dev_priv->pm.irqs_disabled, "IRQs disabled\n");
+       WARN(!intel_irqs_enabled(dev_priv), "IRQs disabled");
 
        if (i915_seqno_passed(ring->get_seqno(ring, true), seqno))
                return 0;
 
 {
        assert_spin_locked(&dev_priv->irq_lock);
 
-       if (WARN_ON(dev_priv->pm.irqs_disabled))
+       if (WARN_ON(!intel_irqs_enabled(dev_priv)))
                return;
 
        if ((dev_priv->irq_mask & mask) != 0) {
 {
        assert_spin_locked(&dev_priv->irq_lock);
 
-       if (dev_priv->pm.irqs_disabled)
+       if (!intel_irqs_enabled(dev_priv))
                return;
 
        if ((dev_priv->irq_mask & mask) != mask) {
 {
        assert_spin_locked(&dev_priv->irq_lock);
 
-       if (WARN_ON(dev_priv->pm.irqs_disabled))
+       if (WARN_ON(!intel_irqs_enabled(dev_priv)))
                return;
 
        dev_priv->gt_irq_mask &= ~interrupt_mask;
 
        assert_spin_locked(&dev_priv->irq_lock);
 
-       if (WARN_ON(dev_priv->pm.irqs_disabled))
+       if (WARN_ON(!intel_irqs_enabled(dev_priv)))
                return;
 
        new_val = dev_priv->pm_irq_mask;
 
        assert_spin_locked(&dev_priv->irq_lock);
 
-       if (WARN_ON(dev_priv->pm.irqs_disabled))
+       if (WARN_ON(!intel_irqs_enabled(dev_priv)))
                return;
 
        new_val = dev_priv->pm_irq_mask;
 
        assert_spin_locked(&dev_priv->irq_lock);
 
-       if (WARN_ON(dev_priv->pm.irqs_disabled))
+       if (WARN_ON(!intel_irqs_enabled(dev_priv)))
                return;
 
        I915_WRITE(SDEIMR, sdeimr);
        struct drm_i915_private *dev_priv = dev->dev_private;
 
        dev->driver->irq_uninstall(dev);
-       dev_priv->pm.irqs_disabled = true;
+       dev_priv->pm._irqs_disabled = true;
 }
 
 /* Restore interrupts so we can recover from runtime PM. */
 {
        struct drm_i915_private *dev_priv = dev->dev_private;
 
-       dev_priv->pm.irqs_disabled = false;
+       dev_priv->pm._irqs_disabled = false;
        dev->driver->irq_preinstall(dev);
        dev->driver->irq_postinstall(dev);
 }
 
         * gen-specific and since we only disable LCPLL after we fully disable
         * the interrupts, the check below should be enough.
         */
-       WARN(!dev_priv->pm.irqs_disabled, "IRQs enabled\n");
+       WARN(intel_irqs_enabled(dev_priv), "IRQs enabled\n");
 }
 
 static uint32_t hsw_read_dcomp(struct drm_i915_private *dev_priv)
 
 void gen8_disable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask);
 void intel_runtime_pm_disable_interrupts(struct drm_device *dev);
 void intel_runtime_pm_restore_interrupts(struct drm_device *dev);
+static inline bool intel_irqs_enabled(struct drm_i915_private *dev_priv)
+{
+       /*
+        * We only use drm_irq_uninstall() at unload and VT switch, so
+        * this is the only thing we need to check.
+        */
+       return !dev_priv->pm._irqs_disabled;
+}
+
 int intel_get_crtc_scanline(struct intel_crtc *crtc);
 void i9xx_check_fifo_underruns(struct drm_device *dev);
 void gen8_irq_power_well_post_enable(struct drm_i915_private *dev_priv);
 
-
 /* intel_crt.c */
 void intel_crt_init(struct drm_device *dev);
 
 
        struct drm_i915_private *dev_priv = dev->dev_private;
 
        /* Interrupts should be disabled already to avoid re-arming. */
-       WARN_ON(dev->irq_enabled && !dev_priv->pm.irqs_disabled);
+       WARN_ON(intel_irqs_enabled(dev_priv));
 
        flush_delayed_work(&dev_priv->rps.delayed_resume_work);
 
        struct drm_i915_private *dev_priv = dev->dev_private;
 
        /* Interrupts should be disabled already to avoid re-arming. */
-       WARN_ON(dev->irq_enabled && !dev_priv->pm.irqs_disabled);
+       WARN_ON(intel_irqs_enabled(dev_priv));
 
        if (IS_IRONLAKE_M(dev)) {
                ironlake_disable_drps(dev);
                          intel_gen6_powersave_work);
 
        dev_priv->pm.suspended = false;
-       dev_priv->pm.irqs_disabled = false;
+       dev_priv->pm._irqs_disabled = false;
 }