u32 rpstat, cagf, reqf;
                u32 rpupei, rpcurup, rpprevup;
                u32 rpdownei, rpcurdown, rpprevdown;
+               u32 pm_ier, pm_imr, pm_isr, pm_iir, pm_mask;
                int max_freq;
 
                /* RPSTAT1 is in the GT power well */
                gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL);
                mutex_unlock(&dev->struct_mutex);
 
+               if (IS_GEN6(dev) || IS_GEN7(dev)) {
+                       pm_ier = I915_READ(GEN6_PMIER);
+                       pm_imr = I915_READ(GEN6_PMIMR);
+                       pm_isr = I915_READ(GEN6_PMISR);
+                       pm_iir = I915_READ(GEN6_PMIIR);
+                       pm_mask = I915_READ(GEN6_PMINTRMSK);
+               } else {
+                       pm_ier = I915_READ(GEN8_GT_IER(2));
+                       pm_imr = I915_READ(GEN8_GT_IMR(2));
+                       pm_isr = I915_READ(GEN8_GT_ISR(2));
+                       pm_iir = I915_READ(GEN8_GT_IIR(2));
+                       pm_mask = I915_READ(GEN6_PMINTRMSK);
+               }
                seq_printf(m, "PM IER=0x%08x IMR=0x%08x ISR=0x%08x IIR=0x%08x, MASK=0x%08x\n",
-                          I915_READ(GEN6_PMIER),
-                          I915_READ(GEN6_PMIMR),
-                          I915_READ(GEN6_PMISR),
-                          I915_READ(GEN6_PMIIR),
-                          I915_READ(GEN6_PMINTRMSK));
+                          pm_ier, pm_imr, pm_isr, pm_iir, pm_mask);
                seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
                seq_printf(m, "Render p-state ratio: %d\n",
                           (gt_perf_status & 0xff00) >> 8);